drivers/net/wireless/mediatek/mt76/npu.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/mediatek/mt76/npu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/mediatek/mt76/npu.c- Extension
.c- Size
- 12304 bytes
- Lines
- 529
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hnet/flow_offload.hnet/pkt_cls.hmt76.hdma.hmt76_connac.h
Detected Declarations
function Copyrightfunction mt76_npu_queue_cleanupfunction mt76_npu_check_ppefunction mt76_npu_rx_pollfunction mt76_npu_irq_handlerfunction mt76_npu_dma_add_buffunction mt76_npu_txdesc_cleanupfunction mt76_npu_queue_setupfunction mt76_npu_rx_queue_initfunction mt76_npu_setup_tc_block_cbfunction mt76_npu_setup_tc_blockfunction mt76_npu_net_setup_tcfunction mt76_npu_send_txrx_addrfunction mt76_npu_disable_irqsfunction mt76_npu_initfunction mt76_npu_deinitexport mt76_npu_check_ppeexport mt76_npu_rx_queue_initexport mt76_npu_net_setup_tcexport mt76_npu_send_txrx_addrexport mt76_npu_disable_irqsexport mt76_npu_init
Annotated Snippet
if (!FIELD_GET(NPU_RX_DMA_DESC_DONE_MASK, desc[index].ctrl)) {
dev_kfree_skb(skb);
return NULL;
}
dma_sync_single_for_cpu(dev->dma_dev, e->dma_addr[0],
e->dma_len[0],
page_pool_get_dma_dir(q->page_pool));
if (!skb) {
skb = napi_build_skb(e->buf, q->buf_size);
if (!skb)
return NULL;
__skb_put(skb, len);
skb_reset_mac_header(skb);
skb_mark_for_recycle(skb);
} else {
struct skb_shared_info *shinfo = skb_shinfo(skb);
struct page *page = virt_to_head_page(e->buf);
int nr_frags = shinfo->nr_frags;
if (nr_frags < ARRAY_SIZE(shinfo->frags))
skb_add_rx_frag(skb, nr_frags, page,
e->buf - page_address(page),
len, q->buf_size);
}
*info = desc[index].info;
index = (index + 1) % q->ndesc;
}
q->tail = index;
q->queued -= i;
Q_WRITE(q, dma_idx, q->tail);
return skb;
}
void mt76_npu_check_ppe(struct mt76_dev *dev, struct sk_buff *skb,
u32 info)
{
struct airoha_ppe_dev *ppe_dev;
u16 reason, hash;
if (!mt76_npu_device_active(dev))
return;
rcu_read_lock();
ppe_dev = rcu_dereference(dev->mmio.ppe_dev);
if (!ppe_dev)
goto out;
hash = FIELD_GET(NPU_RX_DMA_FOE_ID_MASK, info);
skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
reason = FIELD_GET(NPU_RX_DMA_CRSN_MASK, info);
if (reason == PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED) {
skb_set_mac_header(skb, 0);
airoha_ppe_dev_check_skb(ppe_dev, skb, hash, true);
}
out:
rcu_read_unlock();
}
EXPORT_SYMBOL_GPL(mt76_npu_check_ppe);
static int mt76_npu_rx_poll(struct napi_struct *napi, int budget)
{
struct mt76_dev *dev = mt76_priv(napi->dev);
enum mt76_rxq_id qid = napi - dev->napi;
struct airoha_npu *npu;
int done = 0;
rcu_read_lock();
npu = rcu_dereference(dev->mmio.npu);
if (!npu)
goto out;
while (done < budget) {
struct sk_buff *skb;
u32 info = 0;
skb = mt76_npu_dequeue(dev, &dev->q_rx[qid], &info);
if (!skb)
break;
dev->drv->rx_skb(dev, qid, skb, &info);
mt76_rx_poll_complete(dev, qid, napi);
done++;
Annotation
- Immediate include surface: `linux/kernel.h`, `net/flow_offload.h`, `net/pkt_cls.h`, `mt76.h`, `dma.h`, `mt76_connac.h`.
- Detected declarations: `function Copyright`, `function mt76_npu_queue_cleanup`, `function mt76_npu_check_ppe`, `function mt76_npu_rx_poll`, `function mt76_npu_irq_handler`, `function mt76_npu_dma_add_buf`, `function mt76_npu_txdesc_cleanup`, `function mt76_npu_queue_setup`, `function mt76_npu_rx_queue_init`, `function mt76_npu_setup_tc_block_cb`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.