drivers/net/wireless/mediatek/mt7601u/regs.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/mediatek/mt7601u/regs.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/mediatek/mt7601u/regs.h
Extension
.h
Size
19279 bytes
Lines
628
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __MT76_REGS_H
#define __MT76_REGS_H

#include <linux/bitops.h>

#define MT_ASIC_VERSION			0x0000

#define MT76XX_REV_E3		0x22
#define MT76XX_REV_E4		0x33

#define MT_CMB_CTRL			0x0020
#define MT_CMB_CTRL_XTAL_RDY		BIT(22)
#define MT_CMB_CTRL_PLL_LD		BIT(23)

#define MT_EFUSE_CTRL			0x0024
#define MT_EFUSE_CTRL_AOUT		GENMASK(5, 0)
#define MT_EFUSE_CTRL_MODE		GENMASK(7, 6)
#define MT_EFUSE_CTRL_LDO_OFF_TIME	GENMASK(13, 8)
#define MT_EFUSE_CTRL_LDO_ON_TIME	GENMASK(15, 14)
#define MT_EFUSE_CTRL_AIN		GENMASK(25, 16)
#define MT_EFUSE_CTRL_KICK		BIT(30)
#define MT_EFUSE_CTRL_SEL		BIT(31)

#define MT_EFUSE_DATA_BASE		0x0028
#define MT_EFUSE_DATA(_n)		(MT_EFUSE_DATA_BASE + ((_n) << 2))

#define MT_COEXCFG0			0x0040
#define MT_COEXCFG0_COEX_EN		BIT(0)

#define MT_WLAN_FUN_CTRL		0x0080
#define MT_WLAN_FUN_CTRL_WLAN_EN	BIT(0)
#define MT_WLAN_FUN_CTRL_WLAN_CLK_EN	BIT(1)
#define MT_WLAN_FUN_CTRL_WLAN_RESET_RF	BIT(2)

#define MT_WLAN_FUN_CTRL_WLAN_RESET	BIT(3) /* MT76x0 */
#define MT_WLAN_FUN_CTRL_CSR_F20M_CKEN	BIT(3) /* MT76x2 */

#define MT_WLAN_FUN_CTRL_PCIE_CLK_REQ	BIT(4)
#define MT_WLAN_FUN_CTRL_FRC_WL_ANT_SEL	BIT(5)
#define MT_WLAN_FUN_CTRL_INV_ANT_SEL	BIT(6)
#define MT_WLAN_FUN_CTRL_WAKE_HOST	BIT(7)

#define MT_WLAN_FUN_CTRL_THERM_RST	BIT(8) /* MT76x2 */
#define MT_WLAN_FUN_CTRL_THERM_CKEN	BIT(9) /* MT76x2 */

#define MT_WLAN_FUN_CTRL_GPIO_IN	GENMASK(15, 8) /* MT76x0 */
#define MT_WLAN_FUN_CTRL_GPIO_OUT	GENMASK(23, 16) /* MT76x0 */
#define MT_WLAN_FUN_CTRL_GPIO_OUT_EN	GENMASK(31, 24) /* MT76x0 */

#define MT_XO_CTRL0			0x0100
#define MT_XO_CTRL1			0x0104
#define MT_XO_CTRL2			0x0108
#define MT_XO_CTRL3			0x010c
#define MT_XO_CTRL4			0x0110

#define MT_XO_CTRL5			0x0114
#define MT_XO_CTRL5_C2_VAL		GENMASK(14, 8)

#define MT_XO_CTRL6			0x0118
#define MT_XO_CTRL6_C2_CTRL		GENMASK(14, 8)

#define MT_XO_CTRL7			0x011c

#define MT_WLAN_MTC_CTRL		0x10148
#define MT_WLAN_MTC_CTRL_MTCMOS_PWR_UP	BIT(0)
#define MT_WLAN_MTC_CTRL_PWR_ACK	BIT(12)
#define MT_WLAN_MTC_CTRL_PWR_ACK_S	BIT(13)
#define MT_WLAN_MTC_CTRL_BBP_MEM_PD	GENMASK(19, 16)
#define MT_WLAN_MTC_CTRL_PBF_MEM_PD	BIT(20)
#define MT_WLAN_MTC_CTRL_FCE_MEM_PD	BIT(21)
#define MT_WLAN_MTC_CTRL_TSO_MEM_PD	BIT(22)
#define MT_WLAN_MTC_CTRL_BBP_MEM_RB	BIT(24)
#define MT_WLAN_MTC_CTRL_PBF_MEM_RB	BIT(25)
#define MT_WLAN_MTC_CTRL_FCE_MEM_RB	BIT(26)
#define MT_WLAN_MTC_CTRL_TSO_MEM_RB	BIT(27)
#define MT_WLAN_MTC_CTRL_STATE_UP	BIT(28)

#define MT_INT_SOURCE_CSR		0x0200
#define MT_INT_MASK_CSR			0x0204

#define MT_INT_RX_DONE(_n)		BIT(_n)
#define MT_INT_RX_DONE_ALL		GENMASK(1, 0)
#define MT_INT_TX_DONE_ALL		GENMASK(13, 4)
#define MT_INT_TX_DONE(_n)		BIT(_n + 4)
#define MT_INT_RX_COHERENT		BIT(16)
#define MT_INT_TX_COHERENT		BIT(17)
#define MT_INT_ANY_COHERENT		BIT(18)
#define MT_INT_MCU_CMD			BIT(19)
#define MT_INT_TBTT			BIT(20)
#define MT_INT_PRE_TBTT			BIT(21)

Annotation

Implementation Notes