drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c- Extension
.c- Size
- 30282 bytes
- Lines
- 1235
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/firmware.hlinux/pci.hlinux/vmalloc.hlinux/delay.hlinux/interrupt.hlinux/sched.hlinux/crc32.hlinux/completion.hlinux/spinlock.hlinux/circ_buf.hpcie_priv.htopaz_pcie_regs.htopaz_pcie_ipc.hqtn_hw_ids.hcore.hbus.hshm_ipc.hdebug.h
Detected Declarations
struct qtnf_topaz_tx_bdstruct qtnf_topaz_rx_bdstruct qtnf_extra_bd_paramsstruct vmac_pkt_infostruct qtnf_topaz_bdastruct qtnf_pcie_topaz_statefunction qtnf_deassert_intxfunction qtnf_topaz_intx_assertedfunction qtnf_topaz_reset_epfunction setup_rx_irqsfunction enable_rx_irqsfunction disable_rx_irqsfunction qtnf_topaz_ipc_gen_ep_intfunction qtnf_is_statefunction qtnf_set_statefunction qtnf_poll_statefunction topaz_alloc_bd_tablefunction topaz_skb2rbd_attachfunction topaz_alloc_rx_buffersfunction qtnf_topaz_free_xfer_buffersfunction qtnf_pcie_topaz_init_xferfunction qtnf_topaz_data_tx_reclaimfunction qtnf_try_stop_xmitfunction qtnf_try_wake_xmitfunction qtnf_tx_queue_readyfunction qtnf_pcie_data_txfunction qtnf_pcie_topaz_interruptfunction qtnf_rx_data_readyfunction qtnf_topaz_rx_pollfunction qtnf_pcie_data_tx_timeoutfunction qtnf_pcie_data_rx_startfunction qtnf_pcie_data_rx_stopfunction qtnf_dbg_irq_statsfunction qtnf_dbg_pkt_statsfunction qtnf_reset_dma_offsetfunction qtnf_pcie_endian_detectfunction qtnf_pre_init_epfunction qtnf_post_init_epfunction qtnf_ep_fw_loadfunction qtnf_topaz_fw_uploadfunction qtnf_topaz_fw_work_handlerfunction qtnf_reclaim_tasklet_fnfunction qtnf_topaz_dma_mask_getfunction qtnf_pcie_topaz_probefunction qtnf_pcie_topaz_removefunction qtnf_pcie_topaz_suspendfunction qtnf_pcie_topaz_resume
Annotated Snippet
struct qtnf_topaz_tx_bd {
__le32 addr;
__le32 info;
} __packed;
struct qtnf_topaz_rx_bd {
__le32 addr;
__le32 info;
} __packed;
struct qtnf_extra_bd_params {
__le32 param1;
__le32 param2;
__le32 param3;
__le32 param4;
} __packed;
#define QTNF_BD_PARAM_OFFSET(n) offsetof(struct qtnf_extra_bd_params, param##n)
struct vmac_pkt_info {
__le32 addr;
__le32 info;
};
struct qtnf_topaz_bda {
__le16 bda_len;
__le16 bda_version;
__le32 bda_bootstate;
__le32 bda_dma_mask;
__le32 bda_dma_offset;
__le32 bda_flags;
__le32 bda_img;
__le32 bda_img_size;
__le32 bda_ep2h_irqstatus;
__le32 bda_h2ep_irqstatus;
__le32 bda_msi_addr;
u8 reserved1[56];
__le32 bda_flashsz;
u8 bda_boardname[PCIE_BDA_NAMELEN];
__le32 bda_pci_pre_status;
__le32 bda_pci_endian;
__le32 bda_pci_post_status;
__le32 bda_h2ep_txd_budget;
__le32 bda_ep2h_txd_budget;
__le32 bda_rc_rx_bd_base;
__le32 bda_rc_rx_bd_num;
__le32 bda_rc_tx_bd_base;
__le32 bda_rc_tx_bd_num;
u8 bda_ep_link_state;
u8 bda_rc_link_state;
u8 bda_rc_msi_enabled;
u8 reserved2;
__le32 bda_ep_next_pkt;
struct vmac_pkt_info request[QTN_PCIE_RC_TX_QUEUE_LEN];
struct qtnf_shm_ipc_region bda_shm_reg1 __aligned(4096);
struct qtnf_shm_ipc_region bda_shm_reg2 __aligned(4096);
} __packed;
struct qtnf_pcie_topaz_state {
struct qtnf_pcie_bus_priv base;
struct qtnf_topaz_bda __iomem *bda;
dma_addr_t dma_msi_dummy;
u32 dma_msi_imwr;
struct qtnf_topaz_tx_bd *tx_bd_vbase;
struct qtnf_topaz_rx_bd *rx_bd_vbase;
__le32 __iomem *ep_next_rx_pkt;
__le32 __iomem *txqueue_wake;
__le32 __iomem *ep_pmstate;
unsigned long rx_pkt_count;
};
static void qtnf_deassert_intx(struct qtnf_pcie_topaz_state *ts)
{
void __iomem *reg = ts->base.sysctl_bar + TOPAZ_PCIE_CFG0_OFFSET;
u32 cfg;
cfg = readl(reg);
cfg &= ~TOPAZ_ASSERT_INTX;
qtnf_non_posted_write(cfg, reg);
}
static inline int qtnf_topaz_intx_asserted(struct qtnf_pcie_topaz_state *ts)
{
void __iomem *reg = ts->base.sysctl_bar + TOPAZ_PCIE_CFG0_OFFSET;
u32 cfg = readl(reg);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/firmware.h`, `linux/pci.h`, `linux/vmalloc.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/sched.h`, `linux/crc32.h`.
- Detected declarations: `struct qtnf_topaz_tx_bd`, `struct qtnf_topaz_rx_bd`, `struct qtnf_extra_bd_params`, `struct vmac_pkt_info`, `struct qtnf_topaz_bda`, `struct qtnf_pcie_topaz_state`, `function qtnf_deassert_intx`, `function qtnf_topaz_intx_asserted`, `function qtnf_topaz_reset_ep`, `function setup_rx_irqs`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.