drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_regs.h

File Facts

System

Linux kernel

Corpus path

drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_regs.h

Extension

.h

Size

1587 bytes

Lines

46

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __TOPAZ_PCIE_H
#define __TOPAZ_PCIE_H

/* Topaz PCIe DMA registers */
#define PCIE_DMA_WR_INTR_STATUS(base)		((base) + 0x9bc)
#define PCIE_DMA_WR_INTR_MASK(base)		((base) + 0x9c4)
#define PCIE_DMA_WR_INTR_CLR(base)		((base) + 0x9c8)
#define PCIE_DMA_WR_ERR_STATUS(base)		((base) + 0x9cc)
#define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base)	((base) + 0x9D0)
#define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base)	((base) + 0x9d4)

#define PCIE_DMA_RD_INTR_STATUS(base)		((base) + 0x310)
#define PCIE_DMA_RD_INTR_MASK(base)		((base) + 0x319)
#define PCIE_DMA_RD_INTR_CLR(base)		((base) + 0x31c)
#define PCIE_DMA_RD_ERR_STATUS_LOW(base)	((base) + 0x324)
#define PCIE_DMA_RD_ERR_STATUS_HIGH(base)	((base) + 0x328)
#define PCIE_DMA_RD_DONE_IMWR_ADDR_LOW(base)	((base) + 0x33c)
#define PCIE_DMA_RD_DONE_IMWR_ADDR_HIGH(base)	((base) + 0x340)

/* Topaz LHost IPC4 interrupt */
#define TOPAZ_LH_IPC4_INT(base)			((base) + 0x13C)
#define TOPAZ_LH_IPC4_INT_MASK(base)		((base) + 0x140)

#define TOPAZ_RC_TX_DONE_IRQ			(0)
#define TOPAZ_RC_RST_EP_IRQ			(1)
#define TOPAZ_RC_TX_STOP_IRQ			(2)
#define TOPAZ_RC_RX_DONE_IRQ			(3)
#define TOPAZ_RC_PM_EP_IRQ			(4)

/* Topaz LHost M2L interrupt */
#define TOPAZ_CTL_M2L_INT(base)			((base) + 0x2C)
#define TOPAZ_CTL_M2L_INT_MASK(base)		((base) + 0x30)

#define TOPAZ_RC_CTRL_IRQ			(6)

#define TOPAZ_IPC_IRQ_WORD(irq)			(BIT(irq) | BIT(irq + 16))

/* PCIe legacy INTx */
#define TOPAZ_PCIE_CFG0_OFFSET	(0x6C)
#define TOPAZ_ASSERT_INTX	BIT(9)

#endif /* __TOPAZ_PCIE_H */

Annotation

• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.