drivers/net/wireless/ralink/rt2x00/rt2800lib.c

Source file repositories/reference/linux-study-clean/drivers/net/wireless/ralink/rt2x00/rt2800lib.c

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
Extension
.c
Size
391851 bytes
Lines
12347
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (WAIT_FOR_RFCSR_MT7620(rt2x00dev, &reg)) {
			reg = 0;
			rt2x00_set_field32(&reg, RF_CSR_CFG_DATA_MT7620, value);
			rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM_MT7620,
					   word);
			rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE_MT7620, 1);
			rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY_MT7620, 1);

			rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
		}
		break;

	default:
		if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
			reg = 0;
			rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
			rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
			rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
			rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);

			rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
		}
		break;
	}

	mutex_unlock(&rt2x00dev->csr_mutex);
}

static void rt2800_rfcsr_write_bank(struct rt2x00_dev *rt2x00dev, const u8 bank,
				    const unsigned int reg, const u8 value)
{
	rt2800_rfcsr_write(rt2x00dev, (reg | (bank << 6)), value);
}

static void rt2800_rfcsr_write_chanreg(struct rt2x00_dev *rt2x00dev,
				       const unsigned int reg, const u8 value)
{
	rt2800_rfcsr_write_bank(rt2x00dev, 4, reg, value);
	rt2800_rfcsr_write_bank(rt2x00dev, 6, reg, value);
}

static void rt2800_rfcsr_write_dccal(struct rt2x00_dev *rt2x00dev,
				     const unsigned int reg, const u8 value)
{
	rt2800_rfcsr_write_bank(rt2x00dev, 5, reg, value);
	rt2800_rfcsr_write_bank(rt2x00dev, 7, reg, value);
}

static void rt2800_bbp_dcoc_write(struct rt2x00_dev *rt2x00dev,
				  const u8 reg, const u8 value)
{
	rt2800_bbp_write(rt2x00dev, 158, reg);
	rt2800_bbp_write(rt2x00dev, 159, value);
}

static u8 rt2800_bbp_dcoc_read(struct rt2x00_dev *rt2x00dev, const u8 reg)
{
	rt2800_bbp_write(rt2x00dev, 158, reg);
	return rt2800_bbp_read(rt2x00dev, 159);
}

static void rt2800_bbp_glrt_write(struct rt2x00_dev *rt2x00dev,
				  const u8 reg, const u8 value)
{
	rt2800_bbp_write(rt2x00dev, 195, reg);
	rt2800_bbp_write(rt2x00dev, 196, value);
}

static u8 rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev,
			    const unsigned int word)
{
	u32 reg;
	u8 value;

	mutex_lock(&rt2x00dev->csr_mutex);

	/*
	 * Wait until the RFCSR becomes available, afterwards we
	 * can safely write the read request into the register.
	 * After the data has been written, we wait until hardware
	 * returns the correct value, if at any time the register
	 * doesn't become available in time, reg will be 0xffffffff
	 * which means we return 0xff to the caller.
	 */
	switch (rt2x00dev->chip.rt) {
	case RT6352:
		if (WAIT_FOR_RFCSR_MT7620(rt2x00dev, &reg)) {
			reg = 0;
			rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM_MT7620,
					   word);

Annotation

Implementation Notes