drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h
Extension
.h
Size
7639 bytes
Lines
234
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __RTL92C__FW__H__
#define __RTL92C__FW__H__

#define FW_8192C_SIZE				0x8000
#define FW_8192C_START_ADDRESS			0x1000
#define FW_8192C_END_ADDRESS			0x5FFF
#define FW_8192C_PAGE_SIZE			4096
#define FW_8192C_POLLING_DELAY			5
#define FW_8192C_POLLING_TIMEOUT_COUNT		3000

#define IS_FW_HEADER_EXIST(_pfwhdr)		\
	((le16_to_cpu(_pfwhdr->signature) & 0xFFFF) == 0x88E1)
#define USE_OLD_WOWLAN_DEBUG_FW			0

#define H2C_88E_RSVDPAGE_LOC_LEN		5
#define H2C_88E_PWEMODE_LENGTH			5
#define H2C_88E_JOINBSSRPT_LENGTH		1
#define H2C_88E_AP_OFFLOAD_LENGTH		3
#define H2C_88E_WOWLAN_LENGTH			3
#define H2C_88E_KEEP_ALIVE_CTRL_LENGTH		3
#if (USE_OLD_WOWLAN_DEBUG_FW == 0)
#define H2C_88E_REMOTE_WAKE_CTRL_LEN		1
#else
#define H2C_88E_REMOTE_WAKE_CTRL_LEN		3
#endif
#define H2C_88E_AOAC_GLOBAL_INFO_LEN		2
#define H2C_88E_AOAC_RSVDPAGE_LOC_LEN		7

/* Fw PS state for RPWM.
*BIT[2:0] = HW state
*BIT[3] = Protocol PS state,
*1: register active state , 0: register sleep state
*BIT[4] = sub-state
*/
#define	FW_PS_GO_ON			BIT(0)
#define	FW_PS_TX_NULL			BIT(1)
#define	FW_PS_RF_ON			BIT(2)
#define	FW_PS_REGISTER_ACTIVE		BIT(3)

#define	FW_PS_DPS			BIT(0)
#define	FW_PS_LCLK			(FW_PS_DPS)
#define	FW_PS_RF_OFF			BIT(1)
#define	FW_PS_ALL_ON			BIT(2)
#define	FW_PS_ST_ACTIVE			BIT(3)
#define	FW_PS_ISR_ENABLE		BIT(4)
#define	FW_PS_IMR_ENABLE		BIT(5)


#define	FW_PS_ACK			BIT(6)
#define	FW_PS_TOGGLE			BIT(7)

 /* 88E RPWM value*/
 /* BIT[0] = 1: 32k, 0: 40M*/
#define	FW_PS_CLOCK_OFF			BIT(0)		/* 32k*/
#define	FW_PS_CLOCK_ON			0		/*40M*/

#define	FW_PS_STATE_MASK		(0x0F)
#define	FW_PS_STATE_HW_MASK		(0x07)
/*ISR_ENABLE, IMR_ENABLE, and PS mode should be inherited.*/
#define	FW_PS_STATE_INT_MASK		(0x3F)

#define	FW_PS_STATE(x)			(FW_PS_STATE_MASK & (x))
#define	FW_PS_STATE_HW(x)		(FW_PS_STATE_HW_MASK & (x))
#define	FW_PS_STATE_INT(x)		(FW_PS_STATE_INT_MASK & (x))
#define	FW_PS_ISR_VAL(x)		((x) & 0x70)
#define	FW_PS_IMR_MASK(x)		((x) & 0xDF)
#define	FW_PS_KEEP_IMR(x)		((x) & 0x20)

#define	FW_PS_STATE_S0			(FW_PS_DPS)
#define	FW_PS_STATE_S1			(FW_PS_LCLK)
#define	FW_PS_STATE_S2			(FW_PS_RF_OFF)
#define	FW_PS_STATE_S3			(FW_PS_ALL_ON)
#define	FW_PS_STATE_S4			((FW_PS_ST_ACTIVE) | (FW_PS_ALL_ON))
/* ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))*/
#define	FW_PS_STATE_ALL_ON_88E		(FW_PS_CLOCK_ON)
/* (FW_PS_RF_ON)*/
#define	FW_PS_STATE_RF_ON_88E		(FW_PS_CLOCK_ON)
/* 0x0*/
#define	FW_PS_STATE_RF_OFF_88E	(FW_PS_CLOCK_ON)
/* (FW_PS_STATE_RF_OFF)*/
#define	FW_PS_STATE_RF_OFF_LOW_PWR_88E	(FW_PS_CLOCK_OFF)

#define	FW_PS_STATE_ALL_ON_92C		(FW_PS_STATE_S4)
#define	FW_PS_STATE_RF_ON_92C		(FW_PS_STATE_S3)
#define	FW_PS_STATE_RF_OFF_92C		(FW_PS_STATE_S2)
#define	FW_PS_STATE_RF_OFF_LOW_PWR_92C	(FW_PS_STATE_S1)

/* For 88E H2C PwrMode Cmd ID 5.*/
#define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
#define	FW_PWR_STATE_RF_OFF		0

Annotation

Implementation Notes