drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c- Extension
.c- Size
- 88911 bytes
- Lines
- 3165
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
../wifi.h../pci.h../ps.hreg.hdef.hphy.hrf.hdm.htable.h
Detected Declarations
function rtl92ee_phy_query_bb_regfunction rtl92ee_phy_set_bb_regfunction rtl92ee_phy_query_rf_regfunction rtl92ee_phy_set_rf_regfunction _rtl92ee_phy_rf_serial_readfunction _rtl92ee_phy_rf_serial_writefunction rtl92ee_phy_mac_configfunction rtl92ee_phy_bb_configfunction rtl92ee_phy_rf_configfunction _check_conditionfunction _rtl92ee_config_rf_regfunction _rtl92ee_config_rf_radio_afunction _rtl92ee_config_rf_radio_bfunction _rtl92ee_config_bb_regfunction _rtl92ee_phy_init_tx_power_by_ratefunction _rtl92ee_phy_set_txpower_by_rate_basefunction _rtl92ee_phy_get_txpower_by_rate_basefunction _rtl92ee_phy_store_txpower_by_rate_basefunction _phy_convert_txpower_dbm_to_relative_valuefunction phy_convert_txpwr_dbm_to_rel_valfunction _rtl92ee_phy_txpower_by_rate_configurationfunction _rtl92ee_phy_bb8192ee_config_parafilefunction _rtl92ee_phy_config_mac_with_headerfilefunction phy_config_bb_with_hdr_filefunction _rtl92ee_get_rate_section_indexfunction _rtl92ee_store_tx_power_by_ratefunction phy_config_bb_with_pghdrfilefunction rtl92ee_phy_config_rf_with_headerfilefunction rtl92ee_phy_get_hw_reg_originalvaluefunction phy_init_bb_rf_register_deffunction rtl92ee_phy_get_txpower_levelfunction _rtl92ee_phy_get_ratesection_intxpower_byratefunction _rtl92ee_get_txpower_by_ratefunction _rtl92ee_get_txpower_indexfunction _rtl92ee_set_txpower_indexfunction phy_set_txpower_index_by_rate_arrayfunction phy_set_txpower_index_by_rate_sectionfunction rtl92ee_phy_set_txpower_levelfunction _rtl92ee_phy_txpwr_idx_to_dbmfunction rtl92ee_phy_scan_operation_backupfunction rtl92ee_phy_set_bw_mode_callbackfunction rtl92ee_phy_set_bw_modefunction rtl92ee_phy_sw_chnl_callbackfunction rtl92ee_phy_sw_chnlfunction _rtl92ee_phy_sw_chnl_step_by_stepfunction _rtl92ee_phy_set_sw_chnl_cmdarrayfunction _rtl92ee_phy_path_a_iqkfunction _rtl92ee_phy_path_b_iqk
Annotated Snippet
if (addr == 0xb6) {
u32 getvalue;
u8 count = 0;
getvalue = rtl_get_rfreg(hw, rfpath, addr, MASKDWORD);
udelay(1);
while ((getvalue >> 8) != (data >> 8)) {
count++;
rtl_set_rfreg(hw, rfpath, regaddr,
RFREG_OFFSET_MASK, data);
udelay(1);
getvalue = rtl_get_rfreg(hw, rfpath, addr,
MASKDWORD);
if (count > 5)
break;
}
}
if (addr == 0xb2) {
u32 getvalue;
u8 count = 0;
getvalue = rtl_get_rfreg(hw, rfpath, addr, MASKDWORD);
udelay(1);
while (getvalue != data) {
count++;
rtl_set_rfreg(hw, rfpath, regaddr,
RFREG_OFFSET_MASK, data);
udelay(1);
rtl_set_rfreg(hw, rfpath, 0x18,
RFREG_OFFSET_MASK, 0x0fc07);
udelay(1);
getvalue = rtl_get_rfreg(hw, rfpath, addr,
MASKDWORD);
if (count > 5)
break;
}
}
}
}
static void _rtl92ee_config_rf_radio_a(struct ieee80211_hw *hw,
u32 addr, u32 data)
{
u32 content = 0x1000; /*RF Content: radio_a_txt*/
u32 maskforphyset = (u32)(content & 0xE000);
_rtl92ee_config_rf_reg(hw, addr, data, RF90_PATH_A,
addr | maskforphyset);
}
static void _rtl92ee_config_rf_radio_b(struct ieee80211_hw *hw,
u32 addr, u32 data)
{
u32 content = 0x1001; /*RF Content: radio_b_txt*/
u32 maskforphyset = (u32)(content & 0xE000);
_rtl92ee_config_rf_reg(hw, addr, data, RF90_PATH_B,
addr | maskforphyset);
}
static void _rtl92ee_config_bb_reg(struct ieee80211_hw *hw,
u32 addr, u32 data)
{
if (addr == 0xfe)
mdelay(50);
else if (addr == 0xfd)
mdelay(5);
else if (addr == 0xfc)
mdelay(1);
else if (addr == 0xfb)
udelay(50);
else if (addr == 0xfa)
udelay(5);
else if (addr == 0xf9)
udelay(1);
else
rtl_set_bbreg(hw, addr, MASKDWORD , data);
udelay(1);
}
static void _rtl92ee_phy_init_tx_power_by_rate(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &rtlpriv->phy;
u8 band = BAND_ON_2_4G, rf = 0, txnum = 0, sec = 0;
Annotation
- Immediate include surface: `../wifi.h`, `../pci.h`, `../ps.h`, `reg.h`, `def.h`, `phy.h`, `rf.h`, `dm.h`.
- Detected declarations: `function rtl92ee_phy_query_bb_reg`, `function rtl92ee_phy_set_bb_reg`, `function rtl92ee_phy_query_rf_reg`, `function rtl92ee_phy_set_rf_reg`, `function _rtl92ee_phy_rf_serial_read`, `function _rtl92ee_phy_rf_serial_write`, `function rtl92ee_phy_mac_config`, `function rtl92ee_phy_bb_config`, `function rtl92ee_phy_rf_config`, `function _check_condition`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.