drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.c- Extension
.c- Size
- 2446 bytes
- Lines
- 107
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
../wifi.h../pci.hreg.hled.h
Detected Declarations
function rtl92se_sw_led_onfunction rtl92se_sw_led_offfunction _rtl92se_sw_led_controlfunction rtl92se_led_control
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2009-2012 Realtek Corporation.*/
#include "../wifi.h"
#include "../pci.h"
#include "reg.h"
#include "led.h"
void rtl92se_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin)
{
u8 ledcfg;
struct rtl_priv *rtlpriv = rtl_priv(hw);
rtl_dbg(rtlpriv, COMP_LED, DBG_LOUD, "LedAddr:%X ledpin=%d\n",
LEDCFG, pin);
ledcfg = rtl_read_byte(rtlpriv, LEDCFG);
switch (pin) {
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
rtl_write_byte(rtlpriv, LEDCFG, ledcfg & 0xf0);
break;
case LED_PIN_LED1:
rtl_write_byte(rtlpriv, LEDCFG, ledcfg & 0x0f);
break;
default:
pr_err("switch case %#x not processed\n", pin);
break;
}
}
void rtl92se_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin)
{
struct rtl_priv *rtlpriv;
u8 ledcfg;
rtlpriv = rtl_priv(hw);
if (!rtlpriv || rtlpriv->max_fw_size)
return;
rtl_dbg(rtlpriv, COMP_LED, DBG_LOUD, "LedAddr:%X ledpin=%d\n",
LEDCFG, pin);
ledcfg = rtl_read_byte(rtlpriv, LEDCFG);
switch (pin) {
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
ledcfg &= 0xf0;
if (rtlpriv->ledctl.led_opendrain)
rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(1)));
else
rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(3)));
break;
case LED_PIN_LED1:
ledcfg &= 0x0f;
rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(3)));
break;
default:
pr_err("switch case %#x not processed\n", pin);
break;
}
}
static void _rtl92se_sw_led_control(struct ieee80211_hw *hw,
enum led_ctl_mode ledaction)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
enum rtl_led_pin pin0 = rtlpriv->ledctl.sw_led0;
switch (ledaction) {
case LED_CTL_POWER_ON:
case LED_CTL_LINK:
case LED_CTL_NO_LINK:
rtl92se_sw_led_on(hw, pin0);
break;
case LED_CTL_POWER_OFF:
rtl92se_sw_led_off(hw, pin0);
break;
default:
break;
}
}
void rtl92se_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
Annotation
- Immediate include surface: `../wifi.h`, `../pci.h`, `reg.h`, `led.h`.
- Detected declarations: `function rtl92se_sw_led_on`, `function rtl92se_sw_led_off`, `function _rtl92se_sw_led_control`, `function rtl92se_led_control`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.