drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.c- Extension
.c- Size
- 17951 bytes
- Lines
- 639
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
../wifi.h../pci.h../base.h../stats.hreg.hdef.hphy.hfw.htrx.hled.h
Detected Declarations
function _rtl92se_map_hwqueue_to_fwqueuefunction _rtl92se_query_rxphystatusfunction _rtl92se_translate_rx_signal_stufffunction rtl92se_rx_query_descfunction rtl92se_tx_fill_descfunction rtl92se_tx_fill_cmddescfunction rtl92se_set_descfunction rtl92se_get_descfunction rtl92se_tx_polling
Annotated Snippet
if (!cck_highpwr) {
u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
report = cck_buf->cck_agc_rpt & 0xc0;
report = report >> 6;
switch (report) {
case 0x3:
rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
break;
}
} else {
u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
report = p_drvinfo->cfosho[0] & 0x60;
report = report >> 5;
switch (report) {
case 0x3:
rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x2:
rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x1:
rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x0:
rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
break;
}
}
pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
/* CCK gain is smaller than OFDM/MCS gain, */
/* so we add gain diff by experiences, the val is 6 */
pwdb_all += 6;
if (pwdb_all > 100)
pwdb_all = 100;
/* modify the offset to make the same gain index with OFDM. */
if (pwdb_all > 34 && pwdb_all <= 42)
pwdb_all -= 2;
else if (pwdb_all > 26 && pwdb_all <= 34)
pwdb_all -= 6;
else if (pwdb_all > 14 && pwdb_all <= 26)
pwdb_all -= 8;
else if (pwdb_all > 4 && pwdb_all <= 14)
pwdb_all -= 4;
pstats->rx_pwdb_all = pwdb_all;
pstats->recvsignalpower = rx_pwr_all;
if (packet_match_bssid) {
u8 sq;
if (pstats->rx_pwdb_all > 40) {
sq = 100;
} else {
sq = cck_buf->sq_rpt;
if (sq > 64)
sq = 0;
else if (sq < 20)
sq = 100;
else
sq = ((64 - sq) * 100) / 44;
}
pstats->signalquality = sq;
pstats->rx_mimo_sig_qual[0] = sq;
pstats->rx_mimo_sig_qual[1] = -1;
}
} else {
rtlpriv->dm.rfpath_rxenable[0] =
rtlpriv->dm.rfpath_rxenable[1] = true;
for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
if (rtlpriv->dm.rfpath_rxenable[i])
rf_rx_num++;
rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
0x3f) * 2) - 110;
rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
total_rssi += rssi;
rtlpriv->stats.rx_snr_db[i] =
(long)(p_drvinfo->rxsnr[i] / 2);
Annotation
- Immediate include surface: `../wifi.h`, `../pci.h`, `../base.h`, `../stats.h`, `reg.h`, `def.h`, `phy.h`, `fw.h`.
- Detected declarations: `function _rtl92se_map_hwqueue_to_fwqueue`, `function _rtl92se_query_rxphystatus`, `function _rtl92se_translate_rx_signal_stuff`, `function rtl92se_rx_query_desc`, `function rtl92se_tx_fill_desc`, `function rtl92se_tx_fill_cmddesc`, `function rtl92se_set_desc`, `function rtl92se_get_desc`, `function rtl92se_tx_polling`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.