drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c- Extension
.c- Size
- 65825 bytes
- Lines
- 2394
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
../wifi.h../efuse.h../base.h../regd.h../cam.h../ps.h../pci.hreg.hdef.hphy.h../rtl8723com/phy_common.hdm.h../rtl8723com/dm_common.hfw.h../rtl8723com/fw_common.hled.hhw.h../pwrseqcmd.hpwrseq.hbtc.h
Detected Declarations
function _rtl8723e_set_bcn_ctrl_regfunction _rtl8723e_stop_tx_beaconfunction _rtl8723e_resume_tx_beaconfunction _rtl8723e_enable_bcn_sub_funcfunction _rtl8723e_disable_bcn_sub_funcfunction rtl8723e_get_hw_regfunction rtl8723e_set_hw_regfunction _rtl8723e_llt_writefunction _rtl8723e_llt_table_initfunction _rtl8723e_gen_refresh_led_statefunction _rtl8712e_init_macfunction _rtl8723e_hw_configurefunction _rtl8723e_enable_aspm_back_doorfunction rtl8723e_enable_hw_security_configfunction rtl8723e_hw_initfunction _rtl8723e_read_chip_versionfunction _rtl8723e_set_media_statusfunction rtl8723e_set_check_bssidfunction rtl8723e_set_network_typefunction rtl8723e_set_qosfunction rtl8723e_enable_interruptfunction rtl8723e_disable_interruptfunction _rtl8723e_poweroff_adapterfunction rtl8723e_card_disablefunction rtl8723e_interrupt_recognizedfunction rtl8723e_set_beacon_related_registersfunction rtl8723e_set_beacon_intervalfunction rtl8723e_update_interrupt_maskfunction _rtl8723e_get_chnl_groupfunction _rtl8723e_read_txpower_info_from_hwpgfunction _rtl8723e_read_adapter_infofunction _rtl8723e_hal_customized_behaviorfunction rtl8723e_read_eeprom_infofunction rtl8723e_update_hal_rate_tablefunction rtl8723e_update_hal_rate_maskfunction rtl8723e_update_hal_rate_tblfunction rtl8723e_update_channel_access_settingfunction rtl8723e_gpio_radio_on_off_checkingfunction rtl8723e_set_keyfunction rtl8723e_bt_var_initfunction rtl8723e_read_bt_coexist_info_from_hwpgfunction rtl8723e_bt_reg_initfunction rtl8723e_bt_hw_initfunction rtl8723e_suspend
Annotated Snippet
if (rfstate == ERFOFF) {
*((bool *)(val)) = true;
} else {
val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
val_rcr &= 0x00070000;
if (val_rcr)
*((bool *)(val)) = false;
else
*((bool *)(val)) = true;
}
break;
}
case HW_VAR_FW_PSMODE_STATUS:
*((bool *)(val)) = ppsc->fw_current_inpsmode;
break;
case HW_VAR_CORRECT_TSF:{
u64 tsf;
u32 *ptsf_low = (u32 *)&tsf;
u32 *ptsf_high = ((u32 *)&tsf) + 1;
*ptsf_high = rtl_read_dword(rtlpriv, (REG_TSFTR + 4));
*ptsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
*((u64 *)(val)) = tsf;
break;
}
case HAL_DEF_WOWLAN:
break;
default:
rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
"switch case %#x not processed\n", variable);
break;
}
}
void rtl8723e_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
u8 idx;
switch (variable) {
case HW_VAR_ETHER_ADDR:{
for (idx = 0; idx < ETH_ALEN; idx++) {
rtl_write_byte(rtlpriv, (REG_MACID + idx),
val[idx]);
}
break;
}
case HW_VAR_BASIC_RATE:{
u16 b_rate_cfg = ((u16 *)val)[0];
u8 rate_index = 0;
b_rate_cfg = b_rate_cfg & 0x15f;
b_rate_cfg |= 0x01;
rtl_write_byte(rtlpriv, REG_RRSR, b_rate_cfg & 0xff);
rtl_write_byte(rtlpriv, REG_RRSR + 1,
(b_rate_cfg >> 8) & 0xff);
while (b_rate_cfg > 0x1) {
b_rate_cfg = (b_rate_cfg >> 1);
rate_index++;
}
rtl_write_byte(rtlpriv, REG_INIRTS_RATE_SEL,
rate_index);
break;
}
case HW_VAR_BSSID:{
for (idx = 0; idx < ETH_ALEN; idx++) {
rtl_write_byte(rtlpriv, (REG_BSSID + idx),
val[idx]);
}
break;
}
case HW_VAR_SIFS:{
rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]);
rtl_write_byte(rtlpriv, REG_SIFS_TRX + 1, val[1]);
rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]);
rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]);
if (!mac->ht_enable)
rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM,
0x0e0e);
else
rtl_write_word(rtlpriv, REG_RESP_SIFS_OFDM,
*((u16 *)val));
Annotation
- Immediate include surface: `../wifi.h`, `../efuse.h`, `../base.h`, `../regd.h`, `../cam.h`, `../ps.h`, `../pci.h`, `reg.h`.
- Detected declarations: `function _rtl8723e_set_bcn_ctrl_reg`, `function _rtl8723e_stop_tx_beacon`, `function _rtl8723e_resume_tx_beacon`, `function _rtl8723e_enable_bcn_sub_func`, `function _rtl8723e_disable_bcn_sub_func`, `function rtl8723e_get_hw_reg`, `function rtl8723e_set_hw_reg`, `function _rtl8723e_llt_write`, `function _rtl8723e_llt_table_init`, `function _rtl8723e_gen_refresh_led_state`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.