drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c

Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c
Extension
.c
Size
48027 bytes
Lines
1666
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (bitmask != RFREG_OFFSET_MASK) {
			original_value = rtl8723_phy_rf_serial_read(hw,
								    rfpath,
								    regaddr);
			bitshift = calculate_bit_shift(bitmask);
			data =
			    ((original_value & (~bitmask)) |
			     (data << bitshift));
		}

		rtl8723_phy_rf_serial_write(hw, rfpath, regaddr, data);
	} else {
		if (bitmask != RFREG_OFFSET_MASK) {
			bitshift = calculate_bit_shift(bitmask);
			data =
			    ((original_value & (~bitmask)) |
			     (data << bitshift));
		}
		_rtl8723e_phy_fw_rf_serial_write(hw, rfpath, regaddr, data);
	}

	spin_unlock(&rtlpriv->locks.rf_lock);

	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
		regaddr, bitmask, data, rfpath);

}

static void _rtl8723e_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
					     enum radio_path rfpath, u32 offset,
					     u32 data)
{
	WARN_ONCE(true, "rtl8723ae: _rtl8723e_phy_fw_rf_serial_write deprecated!\n");
}

static void _rtl8723e_phy_bb_config_1t(struct ieee80211_hw *hw)
{
	rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2);
	rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022);
	rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45);
	rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23);
	rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1);
	rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2);
	rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2);
	rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2);
	rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2);
	rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2);
}

bool rtl8723e_phy_mac_config(struct ieee80211_hw *hw)
{
	struct rtl_priv *rtlpriv = rtl_priv(hw);
	bool rtstatus = _rtl8723e_phy_config_mac_with_headerfile(hw);
	rtl_write_byte(rtlpriv, 0x04CA, 0x0A);
	return rtstatus;
}

bool rtl8723e_phy_bb_config(struct ieee80211_hw *hw)
{
	bool rtstatus = true;
	struct rtl_priv *rtlpriv = rtl_priv(hw);
	u8 tmpu1b;
	u8 b_reg_hwparafile = 1;

	rtl8723_phy_init_bb_rf_reg_def(hw);

	/* 1. 0x28[1] = 1 */
	tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_PLL_CTRL);
	udelay(2);
	rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, (tmpu1b|BIT(1)));
	udelay(2);
	/* 2. 0x29[7:0] = 0xFF */
	rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL+1, 0xff);
	udelay(2);

	/* 3. 0x02[1:0] = 2b'11 */
	tmpu1b = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN);
	rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN,
		       (tmpu1b | FEN_BB_GLB_RSTN | FEN_BBRSTB));

	/* 4. 0x25[6] = 0 */
	tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+1);
	rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+1, (tmpu1b & (~BIT(6))));

	/* 5. 0x24[20] = 0	//Advised by SD3 Alex Wang. 2011.02.09. */
	tmpu1b = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2);
	rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, (tmpu1b & (~BIT(4))));

	/* 6. 0x1f[7:0] = 0x07 */

Annotation

Implementation Notes