drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c- Extension
.c- Size
- 75203 bytes
- Lines
- 2657
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
../wifi.h../pci.h../ps.hreg.hdef.hphy.h../rtl8723com/phy_common.hrf.hdm.h../rtl8723com/dm_common.htable.htrx.hlinux/kernel.h
Detected Declarations
function rtl8723be_phy_query_rf_regfunction rtl8723be_phy_set_rf_regfunction rtl8723be_phy_mac_configfunction rtl8723be_phy_bb_configfunction rtl8723be_phy_rf_configfunction _rtl8723be_check_positivefunction _rtl8723be_config_rf_regfunction _rtl8723be_config_rf_radio_afunction _rtl8723be_phy_init_tx_power_by_ratefunction _rtl8723be_config_bb_regfunction _rtl8723be_phy_set_txpower_by_rate_basefunction _rtl8723be_phy_get_txpower_by_rate_basefunction _rtl8723be_phy_store_txpower_by_rate_basefunction _phy_convert_txpower_dbm_to_relative_valuefunction _rtl8723be_phy_convert_txpower_dbm_to_relative_valuefunction phy_txpower_by_rate_configfunction _rtl8723be_phy_bb8723b_config_parafilefunction rtl8723be_phy_config_with_headerfilefunction _rtl8723be_phy_config_mac_with_headerfilefunction _rtl8723be_phy_config_bb_with_headerfilefunction _rtl8723be_get_rate_section_indexfunction _rtl8723be_store_tx_power_by_ratefunction _rtl8723be_phy_config_bb_with_pgheaderfilefunction rtl8723be_phy_config_rf_with_headerfilefunction rtl8723be_phy_get_hw_reg_originalvaluefunction _rtl8723be_phy_get_ratesection_intxpower_byratefunction _rtl8723be_get_txpower_by_ratefunction _rtl8723be_get_txpower_indexfunction _rtl8723be_phy_set_txpower_indexfunction rtl8723be_phy_set_txpower_levelfunction rtl8723be_phy_scan_operation_backupfunction rtl8723be_phy_set_bw_mode_callbackfunction rtl8723be_phy_set_bw_modefunction rtl8723be_phy_sw_chnl_callbackfunction rtl8723be_phy_sw_chnlfunction _rtl8723be_phy_sw_chnl_step_by_stepfunction _rtl8723be_phy_path_a_iqkfunction _rtl8723be_phy_path_a_rx_iqkfunction _rtl8723be_phy_path_b_iqkfunction _rtl8723be_phy_path_b_rx_iqkfunction _rtl8723be_phy_path_b_fill_iqk_matrixfunction _rtl8723be_phy_simularity_comparefunction _rtl8723be_phy_iq_calibratefunction _get_right_chnl_place_for_iqkfunction _rtl8723be_phy_lc_calibratefunction _rtl8723be_phy_set_rfpath_switchfunction rtl8723be_phy_iq_calibratefunction rtl8723be_phy_lc_calibrate
Annotated Snippet
switch (rate_section) {
case CCK:
rtlphy->txpwr_by_rate_base_24g[path][txnum][0] = value;
break;
case OFDM:
rtlphy->txpwr_by_rate_base_24g[path][txnum][1] = value;
break;
case HT_MCS0_MCS7:
rtlphy->txpwr_by_rate_base_24g[path][txnum][2] = value;
break;
case HT_MCS8_MCS15:
rtlphy->txpwr_by_rate_base_24g[path][txnum][3] = value;
break;
default:
rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
"Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in PHY_SetTxPowerByRateBase()\n",
rate_section, path, txnum);
break;
}
} else {
rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
"Invalid Band %d in PHY_SetTxPowerByRateBase()\n",
band);
}
}
static u8 _rtl8723be_phy_get_txpower_by_rate_base(struct ieee80211_hw *hw,
u8 band, u8 path, u8 txnum,
u8 rate_section)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &rtlpriv->phy;
u8 value = 0;
if (path > RF90_PATH_D) {
rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
"Invalid Rf Path %d in PHY_GetTxPowerByRateBase()\n",
path);
return 0;
}
if (band == BAND_ON_2_4G) {
switch (rate_section) {
case CCK:
value = rtlphy->txpwr_by_rate_base_24g[path][txnum][0];
break;
case OFDM:
value = rtlphy->txpwr_by_rate_base_24g[path][txnum][1];
break;
case HT_MCS0_MCS7:
value = rtlphy->txpwr_by_rate_base_24g[path][txnum][2];
break;
case HT_MCS8_MCS15:
value = rtlphy->txpwr_by_rate_base_24g[path][txnum][3];
break;
default:
rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
"Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n",
rate_section, path, txnum);
break;
}
} else {
rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
"Invalid Band %d in PHY_GetTxPowerByRateBase()\n",
band);
}
return value;
}
static void _rtl8723be_phy_store_txpower_by_rate_base(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_phy *rtlphy = &rtlpriv->phy;
u16 rawvalue = 0;
u8 base = 0, path = 0;
for (path = RF90_PATH_A; path <= RF90_PATH_B; ++path) {
if (path == RF90_PATH_A) {
rawvalue = (u16)(rtlphy->tx_power_by_rate_offset
[BAND_ON_2_4G][path][RF_1TX][3] >> 24) & 0xFF;
base = (rawvalue >> 4) * 10 + (rawvalue & 0xF);
_rtl8723be_phy_set_txpower_by_rate_base(hw,
BAND_ON_2_4G, path, CCK, RF_1TX, base);
} else if (path == RF90_PATH_B) {
rawvalue = (u16)(rtlphy->tx_power_by_rate_offset
[BAND_ON_2_4G][path][RF_1TX][3] >> 0) & 0xFF;
base = (rawvalue >> 4) * 10 + (rawvalue & 0xF);
_rtl8723be_phy_set_txpower_by_rate_base(hw,
BAND_ON_2_4G,
Annotation
- Immediate include surface: `../wifi.h`, `../pci.h`, `../ps.h`, `reg.h`, `def.h`, `phy.h`, `../rtl8723com/phy_common.h`, `rf.h`.
- Detected declarations: `function rtl8723be_phy_query_rf_reg`, `function rtl8723be_phy_set_rf_reg`, `function rtl8723be_phy_mac_config`, `function rtl8723be_phy_bb_config`, `function rtl8723be_phy_rf_config`, `function _rtl8723be_check_positive`, `function _rtl8723be_config_rf_reg`, `function _rtl8723be_config_rf_radio_a`, `function _rtl8723be_phy_init_tx_power_by_rate`, `function _rtl8723be_config_bb_reg`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.