drivers/net/wireless/realtek/rtw88/bf.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw88/bf.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw88/bf.c- Extension
.c- Size
- 12380 bytes
- Lines
- 417
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
main.hreg.hbf.hdebug.h
Detected Declarations
function rtw_bf_disassocfunction rtw_bf_assocfunction rtw_bf_init_bfer_entry_mufunction rtw_bf_cfg_soundingfunction rtw_bf_cfg_mu_bfeefunction rtw_bf_del_bfer_entry_mufunction rtw_bf_del_soundingfunction rtw_bf_enable_bfee_sufunction rtw_bf_enable_bfee_mufunction rtw_bf_remove_bfee_sufunction rtw_bf_remove_bfee_mufunction rtw_bf_set_gid_tablefunction rtw_bf_phy_initfunction rtw_bf_cfg_csi_rateexport rtw_bf_enable_bfee_suexport rtw_bf_enable_bfee_muexport rtw_bf_remove_bfee_suexport rtw_bf_remove_bfee_muexport rtw_bf_set_gid_tableexport rtw_bf_phy_initexport rtw_bf_cfg_csi_rate
Annotated Snippet
if (bfinfo->bfer_mu_cnt >= chip->bfer_mu_max_num) {
rtw_dbg(rtwdev, RTW_DBG_BF, "mu bfer number over limit\n");
return;
}
ether_addr_copy(bfee->mac_addr, bssid);
bfee->role = RTW_BFEE_MU;
bfee->p_aid = (bssid[5] << 1) | (bssid[4] >> 7);
bfee->aid = vif->cfg.aid;
bfinfo->bfer_mu_cnt++;
rtw_chip_config_bfee(rtwdev, rtwvif, bfee, true);
} else if ((ic_vht_cap->cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE) &&
(vht_cap->cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) {
if (bfinfo->bfer_su_cnt >= chip->bfer_su_max_num) {
rtw_dbg(rtwdev, RTW_DBG_BF, "su bfer number over limit\n");
return;
}
sound_dim = vht_cap->cap &
IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK;
sound_dim >>= IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_SHIFT;
ether_addr_copy(bfee->mac_addr, bssid);
bfee->role = RTW_BFEE_SU;
bfee->sound_dim = (u8)sound_dim;
bfee->g_id = 0;
bfee->p_aid = (bssid[5] << 1) | (bssid[4] >> 7);
bfinfo->bfer_su_cnt++;
for (i = 0; i < chip->bfer_su_max_num; i++) {
if (!test_bit(i, bfinfo->bfer_su_reg_maping)) {
set_bit(i, bfinfo->bfer_su_reg_maping);
bfee->su_reg_index = i;
break;
}
}
rtw_chip_config_bfee(rtwdev, rtwvif, bfee, true);
}
}
void rtw_bf_init_bfer_entry_mu(struct rtw_dev *rtwdev,
struct mu_bfer_init_para *param)
{
u16 mu_bf_ctl = 0;
u8 *addr = param->bfer_address;
int i;
for (i = 0; i < ETH_ALEN; i++)
rtw_write8(rtwdev, REG_ASSOCIATED_BFMER0_INFO + i, addr[i]);
rtw_write16(rtwdev, REG_ASSOCIATED_BFMER0_INFO + 6, param->paid);
rtw_write16(rtwdev, REG_TX_CSI_RPT_PARAM_BW20, param->csi_para);
mu_bf_ctl = rtw_read16(rtwdev, REG_WMAC_MU_BF_CTL) & 0xC000;
mu_bf_ctl |= param->my_aid | (param->csi_length_sel << 12);
rtw_write16(rtwdev, REG_WMAC_MU_BF_CTL, mu_bf_ctl);
}
void rtw_bf_cfg_sounding(struct rtw_dev *rtwdev, struct rtw_vif *vif,
enum rtw_trx_desc_rate rate)
{
u8 csi_rsc = CSI_RSC_FOLLOW_RX_PACKET_BW;
u32 psf_ctl = 0;
if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C)
csi_rsc = CSI_RSC_PRIMARY_20M_BW;
psf_ctl = rtw_read32(rtwdev, REG_BBPSF_CTRL) |
BIT_WMAC_USE_NDPARATE |
(csi_rsc << 13);
rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM,
RTW_SND_CTRL_SOUNDING);
rtw_write8(rtwdev, REG_SND_PTCL_CTRL + 3, 0x26);
rtw_write8_clr(rtwdev, REG_RXFLTMAP1, BIT_RXFLTMAP1_BF_REPORT_POLL);
rtw_write8_clr(rtwdev, REG_RXFLTMAP4, BIT_RXFLTMAP4_BF_REPORT_POLL);
if (vif->net_type == RTW_NET_AP_MODE)
rtw_write32(rtwdev, REG_BBPSF_CTRL, psf_ctl | BIT(12));
else
rtw_write32(rtwdev, REG_BBPSF_CTRL, psf_ctl & ~BIT(12));
}
void rtw_bf_cfg_mu_bfee(struct rtw_dev *rtwdev, struct cfg_mumimo_para *param)
{
u8 mu_tbl_sel;
u8 mu_valid;
mu_valid = rtw_read8(rtwdev, REG_MU_TX_CTL) &
~BIT_MASK_R_MU_TABLE_VALID;
Annotation
- Immediate include surface: `main.h`, `reg.h`, `bf.h`, `debug.h`.
- Detected declarations: `function rtw_bf_disassoc`, `function rtw_bf_assoc`, `function rtw_bf_init_bfer_entry_mu`, `function rtw_bf_cfg_sounding`, `function rtw_bf_cfg_mu_bfee`, `function rtw_bf_del_bfer_entry_mu`, `function rtw_bf_del_sounding`, `function rtw_bf_enable_bfee_su`, `function rtw_bf_enable_bfee_mu`, `function rtw_bf_remove_bfee_su`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.