drivers/net/wireless/realtek/rtw88/bf.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw88/bf.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw88/bf.h- Extension
.h- Size
- 4011 bytes
- Lines
- 125
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct cfg_mumimo_parastruct mu_bfer_init_paraenum csi_rscenum csi_seg_lenfunction rtw_chip_config_bfeefunction rtw_chip_set_gid_tablefunction rtw_chip_cfg_csi_rate
Annotated Snippet
struct cfg_mumimo_para {
u8 sounding_sts[6];
u16 grouping_bitmap;
u8 mu_tx_en;
u32 given_gid_tab[2];
u32 given_user_pos[4];
};
struct mu_bfer_init_para {
u16 paid;
u16 csi_para;
u16 my_aid;
enum csi_seg_len csi_length_sel;
u8 bfer_address[ETH_ALEN];
};
void rtw_bf_disassoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *bss_conf);
void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *bss_conf);
void rtw_bf_init_bfer_entry_mu(struct rtw_dev *rtwdev,
struct mu_bfer_init_para *param);
void rtw_bf_cfg_sounding(struct rtw_dev *rtwdev, struct rtw_vif *vif,
enum rtw_trx_desc_rate rate);
void rtw_bf_cfg_mu_bfee(struct rtw_dev *rtwdev, struct cfg_mumimo_para *param);
void rtw_bf_del_bfer_entry_mu(struct rtw_dev *rtwdev);
void rtw_bf_del_sounding(struct rtw_dev *rtwdev);
void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif,
struct rtw_bfee *bfee);
void rtw_bf_enable_bfee_mu(struct rtw_dev *rtwdev, struct rtw_vif *vif,
struct rtw_bfee *bfee);
void rtw_bf_remove_bfee_su(struct rtw_dev *rtwdev, struct rtw_bfee *bfee);
void rtw_bf_remove_bfee_mu(struct rtw_dev *rtwdev, struct rtw_bfee *bfee);
void rtw_bf_set_gid_table(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *conf);
void rtw_bf_phy_init(struct rtw_dev *rtwdev);
void rtw_bf_cfg_csi_rate(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate,
u8 fixrate_en, u8 *new_rate);
static inline void rtw_chip_config_bfee(struct rtw_dev *rtwdev, struct rtw_vif *vif,
struct rtw_bfee *bfee, bool enable)
{
if (rtwdev->chip->ops->config_bfee)
rtwdev->chip->ops->config_bfee(rtwdev, vif, bfee, enable);
}
static inline void rtw_chip_set_gid_table(struct rtw_dev *rtwdev,
struct ieee80211_vif *vif,
struct ieee80211_bss_conf *conf)
{
if (rtwdev->chip->ops->set_gid_table)
rtwdev->chip->ops->set_gid_table(rtwdev, vif, conf);
}
static inline void rtw_chip_cfg_csi_rate(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate,
u8 fixrate_en, u8 *new_rate)
{
if (rtwdev->chip->ops->cfg_csi_rate)
rtwdev->chip->ops->cfg_csi_rate(rtwdev, rssi, cur_rate,
fixrate_en, new_rate);
}
#endif
Annotation
- Detected declarations: `struct cfg_mumimo_para`, `struct mu_bfer_init_para`, `enum csi_rsc`, `enum csi_seg_len`, `function rtw_chip_config_bfee`, `function rtw_chip_set_gid_table`, `function rtw_chip_cfg_csi_rate`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.