drivers/net/wireless/realtek/rtw88/mac.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw88/mac.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw88/mac.c- Extension
.c- Size
- 36164 bytes
- Lines
- 1422
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
main.hmac.hreg.hfw.hdebug.hsdio.h
Detected Declarations
function rtw_set_channel_macfunction rtw_mac_pre_system_cfgfunction do_pwr_poll_cmdfunction rtw_pwr_cmd_pollingfunction rtw_sub_pwr_seq_parserfunction rtw_pwr_seq_parserfunction rtw_mac_power_switchfunction __rtw_mac_init_system_cfgfunction __rtw_mac_init_system_cfg_legacyfunction rtw_mac_init_system_cfgfunction rtw_mac_power_onfunction rtw_mac_power_offfunction check_firmware_sizefunction wlan_cpu_enablefunction download_firmware_reg_backupfunction download_firmware_reset_platformfunction download_firmware_reg_restorefunction send_firmware_pkt_rsvd_pagefunction send_firmware_pktfunction iddma_enablefunction iddma_download_firmwarefunction rtw_ddma_to_fw_fifofunction check_fw_checksumfunction download_firmware_to_memfunction start_download_firmwarefunction download_firmware_validatefunction download_firmware_end_flowfunction __rtw_download_firmwarefunction en_download_firmware_legacyfunction rtw_write_firmware_pagefunction download_firmware_legacyfunction download_firmware_validate_legacyfunction __rtw_download_firmware_legacyfunction rtw_read8_maskfunction _rtw_download_firmwarefunction rtw_download_firmwarefunction get_priority_queuesfunction __rtw_mac_flush_prio_queuefunction rtw_mac_flush_prio_queuesfunction rtw_mac_flush_queuesfunction txdma_queue_mappingfunction rtw_set_trx_fifo_infofunction __priority_queue_cfgfunction __priority_queue_cfg_legacyfunction priority_queue_cfgfunction init_h2cfunction rtw_init_trx_cfgfunction rtw_drv_info_cfg
Annotated Snippet
if (retry == RTW_PWR_POLLING_CNT) {
rtw_err(rtwdev, "failed to poll REG_SDIO_HSUS_CTRL[1]");
return -ETIMEDOUT;
}
if (rtw_sdio_is_sdio30_supported(rtwdev))
rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2,
BIT_SDIO_PAD_E5 >> 16);
else
rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2,
BIT_SDIO_PAD_E5 >> 16);
break;
case RTW_HCI_TYPE_USB:
break;
default:
return -EINVAL;
}
/* config PIN Mux */
value32 = rtw_read32(rtwdev, REG_PAD_CTRL1);
value32 |= BIT_PAPE_WLBT_SEL | BIT_LNAON_WLBT_SEL;
rtw_write32(rtwdev, REG_PAD_CTRL1, value32);
value32 = rtw_read32(rtwdev, REG_LED_CFG);
value32 &= ~(BIT_PAPE_SEL_EN | BIT_LNAON_SEL_EN);
rtw_write32(rtwdev, REG_LED_CFG, value32);
value32 = rtw_read32(rtwdev, REG_GPIO_MUXCFG);
value32 |= BIT_WLRFE_4_5_EN;
rtw_write32(rtwdev, REG_GPIO_MUXCFG, value32);
/* disable BB/RF */
value8 = rtw_read8(rtwdev, REG_SYS_FUNC_EN);
value8 &= ~(BIT_FEN_BB_RSTB | BIT_FEN_BB_GLB_RST);
rtw_write8(rtwdev, REG_SYS_FUNC_EN, value8);
value8 = rtw_read8(rtwdev, REG_RF_CTRL);
value8 &= ~(BIT_RF_SDM_RSTB | BIT_RF_RSTB | BIT_RF_EN);
rtw_write8(rtwdev, REG_RF_CTRL, value8);
value32 = rtw_read32(rtwdev, REG_WLRF1);
value32 &= ~BIT_WLRF1_BBRF_EN;
rtw_write32(rtwdev, REG_WLRF1, value32);
return 0;
}
static bool do_pwr_poll_cmd(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 target)
{
u32 val;
target &= mask;
return read_poll_timeout_atomic(rtw_read8, val, (val & mask) == target,
50, 50 * RTW_PWR_POLLING_CNT, false,
rtwdev, addr) == 0;
}
static int rtw_pwr_cmd_polling(struct rtw_dev *rtwdev,
const struct rtw_pwr_seq_cmd *cmd)
{
u8 value;
u32 offset;
if (cmd->base == RTW_PWR_ADDR_SDIO)
offset = cmd->offset | SDIO_LOCAL_OFFSET;
else
offset = cmd->offset;
if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value))
return 0;
if (rtw_hci_type(rtwdev) != RTW_HCI_TYPE_PCIE)
goto err;
/* if PCIE, toggle BIT_PFM_WOWL and try again */
value = rtw_read8(rtwdev, REG_SYS_PW_CTRL);
if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D)
rtw_write8(rtwdev, REG_SYS_PW_CTRL, value & ~BIT_PFM_WOWL);
rtw_write8(rtwdev, REG_SYS_PW_CTRL, value | BIT_PFM_WOWL);
rtw_write8(rtwdev, REG_SYS_PW_CTRL, value & ~BIT_PFM_WOWL);
if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D)
rtw_write8(rtwdev, REG_SYS_PW_CTRL, value | BIT_PFM_WOWL);
if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value))
return 0;
err:
rtw_err(rtwdev, "failed to poll offset=0x%x mask=0x%x value=0x%x\n",
offset, cmd->mask, cmd->value);
Annotation
- Immediate include surface: `main.h`, `mac.h`, `reg.h`, `fw.h`, `debug.h`, `sdio.h`.
- Detected declarations: `function rtw_set_channel_mac`, `function rtw_mac_pre_system_cfg`, `function do_pwr_poll_cmd`, `function rtw_pwr_cmd_polling`, `function rtw_sub_pwr_seq_parser`, `function rtw_pwr_seq_parser`, `function rtw_mac_power_switch`, `function __rtw_mac_init_system_cfg`, `function __rtw_mac_init_system_cfg_legacy`, `function rtw_mac_init_system_cfg`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.