drivers/net/wireless/realtek/rtw88/main.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw88/main.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw88/main.h- Extension
.h- Size
- 49287 bytes
- Lines
- 2287
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
net/mac80211.hlinux/vmalloc.hlinux/firmware.hlinux/average.hlinux/bitops.hlinux/bitfield.hlinux/iopoll.hlinux/interrupt.hlinux/workqueue.hutil.hhci.h
Detected Declarations
struct rtw_devstruct rtw_debugfsstruct rtw_hcistruct rtw_2g_1s_pwr_idx_diffstruct rtw_2g_ns_pwr_idx_diffstruct rtw_2g_txpwr_idxstruct rtw_5g_ht_1s_pwr_idx_diffstruct rtw_5g_ht_ns_pwr_idx_diffstruct rtw_5g_ofdm_ns_pwr_idx_diffstruct rtw_5g_vht_ns_pwr_idx_diffstruct rtw_5g_txpwr_idxstruct rtw_txpwr_idxstruct rtw_channel_paramsstruct rtw_hw_regstruct rtw_hw_reg_descstruct rtw_ltecoex_addrstruct rtw_reg_domainstruct rtw_rf_sipi_addrstruct rtw_hw_reg_offsetstruct rtw_backup_infostruct rtw_vif_portstruct rtw_tx_pkt_infostruct rtw_rx_pkt_statstruct rtw_traffic_statsstruct rtw_lps_confstruct rtw_cam_entrystruct rtw_sec_descstruct rtw_tx_reportstruct rtw_ra_reportstruct rtw_txqstruct rtw_sta_infostruct rtw_bfeestruct rtw_bf_infostruct rtw_vifstruct rtw_regulatorystruct rtw_regdstruct rtw_chip_opsstruct rtw_pwr_seq_cmdstruct rtw_rqpnstruct rtw_prioq_addrstruct rtw_prioq_addrsstruct rtw_page_tablestruct rtw_intf_phy_parastruct rtw_wow_patternstruct rtw_pno_requeststruct rtw_wow_paramstruct rtw_intf_phy_para_tablestruct rtw_table
Annotated Snippet
struct rtw_hci {
const struct rtw_hci_ops *ops;
enum rtw_hci_type type;
u32 rpwm_addr;
u32 cpwm_addr;
u8 bulkout_num;
};
#define IS_CH_5G_BAND_1(channel) ((channel) >= 36 && (channel <= 48))
#define IS_CH_5G_BAND_2(channel) ((channel) >= 52 && (channel <= 64))
#define IS_CH_5G_BAND_3(channel) ((channel) >= 100 && (channel <= 144))
#define IS_CH_5G_BAND_4(channel) ((channel) >= 149 && (channel <= 177))
#define IS_CH_5G_BAND_MID(channel) \
(IS_CH_5G_BAND_2(channel) || IS_CH_5G_BAND_3(channel))
#define IS_CH_2G_BAND(channel) ((channel) <= 14)
#define IS_CH_5G_BAND(channel) \
(IS_CH_5G_BAND_1(channel) || IS_CH_5G_BAND_2(channel) || \
IS_CH_5G_BAND_3(channel) || IS_CH_5G_BAND_4(channel))
enum rtw_supported_band {
RTW_BAND_2G = BIT(NL80211_BAND_2GHZ),
RTW_BAND_5G = BIT(NL80211_BAND_5GHZ),
RTW_BAND_60G = BIT(NL80211_BAND_60GHZ),
};
/* now, support up to 80M bw */
#define RTW_MAX_CHANNEL_WIDTH RTW_CHANNEL_WIDTH_80
enum rtw_bandwidth {
RTW_CHANNEL_WIDTH_20 = 0,
RTW_CHANNEL_WIDTH_40 = 1,
RTW_CHANNEL_WIDTH_80 = 2,
RTW_CHANNEL_WIDTH_160 = 3,
RTW_CHANNEL_WIDTH_80_80 = 4,
RTW_CHANNEL_WIDTH_5 = 5,
RTW_CHANNEL_WIDTH_10 = 6,
};
enum rtw_sc_offset {
RTW_SC_DONT_CARE = 0,
RTW_SC_20_UPPER = 1,
RTW_SC_20_LOWER = 2,
RTW_SC_20_UPMOST = 3,
RTW_SC_20_LOWEST = 4,
RTW_SC_40_UPPER = 9,
RTW_SC_40_LOWER = 10,
};
enum rtw_net_type {
RTW_NET_NO_LINK = 0,
RTW_NET_AD_HOC = 1,
RTW_NET_MGD_LINKED = 2,
RTW_NET_AP_MODE = 3,
};
enum rtw_rf_type {
RF_1T1R = 0,
RF_1T2R = 1,
RF_2T2R = 2,
RF_2T3R = 3,
RF_2T4R = 4,
RF_3T3R = 5,
RF_3T4R = 6,
RF_4T4R = 7,
RF_TYPE_MAX,
};
enum rtw_rf_path {
RF_PATH_A = 0,
RF_PATH_B = 1,
RF_PATH_C = 2,
RF_PATH_D = 3,
};
enum rtw_bb_path {
BB_PATH_A = BIT(0),
BB_PATH_B = BIT(1),
BB_PATH_C = BIT(2),
BB_PATH_D = BIT(3),
BB_PATH_AB = (BB_PATH_A | BB_PATH_B),
BB_PATH_AC = (BB_PATH_A | BB_PATH_C),
BB_PATH_AD = (BB_PATH_A | BB_PATH_D),
BB_PATH_BC = (BB_PATH_B | BB_PATH_C),
BB_PATH_BD = (BB_PATH_B | BB_PATH_D),
BB_PATH_CD = (BB_PATH_C | BB_PATH_D),
Annotation
- Immediate include surface: `net/mac80211.h`, `linux/vmalloc.h`, `linux/firmware.h`, `linux/average.h`, `linux/bitops.h`, `linux/bitfield.h`, `linux/iopoll.h`, `linux/interrupt.h`.
- Detected declarations: `struct rtw_dev`, `struct rtw_debugfs`, `struct rtw_hci`, `struct rtw_2g_1s_pwr_idx_diff`, `struct rtw_2g_ns_pwr_idx_diff`, `struct rtw_2g_txpwr_idx`, `struct rtw_5g_ht_1s_pwr_idx_diff`, `struct rtw_5g_ht_ns_pwr_idx_diff`, `struct rtw_5g_ofdm_ns_pwr_idx_diff`, `struct rtw_5g_vht_ns_pwr_idx_diff`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.