drivers/net/wireless/realtek/rtw88/phy.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw88/phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw88/phy.c- Extension
.c- Size
- 70155 bytes
- Lines
- 2700
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bcd.hmain.hreg.hfw.hphy.hdebug.hregd.hsar.h
Detected Declarations
struct phy_cfg_pairstruct rtw_phy_stat_iter_datastruct rtw_rx_addr_match_dataenum rtw_phy_band_typefunction rtw_phy_cck_pd_initfunction rtw_phy_set_edcca_thfunction rtw_phy_adaptivity_set_modefunction rtw_phy_adaptivity_initfunction rtw_phy_adaptivityfunction rtw_phy_cfo_initfunction rtw_phy_tx_path_div_initfunction rtw_phy_initfunction rtw_phy_dig_writefunction rtw_phy_stat_false_alarmfunction rtw_phy_get_rssi_levelfunction rtw_phy_stat_rssi_iterfunction rtw_phy_stat_rssifunction rtw_phy_stat_rate_cntfunction rtw_phy_statisticsfunction rtw_phy_dig_set_max_coveragefunction rtw_phy_dig_resetfunction rtw_phy_dig_check_dampingfunction rtw_phy_dig_get_boundaryfunction rtw_phy_dig_get_thresholdfunction rtw_phy_dig_recorderfunction rtw_phy_digfunction rtw_phy_ra_info_update_iterfunction rtw_phy_ra_info_updatefunction rtw_phy_get_rrsr_maskfunction rtw_phy_rrsr_mask_min_iterfunction rtw_phy_rrsr_updatefunction rtw_phy_dpk_trackfunction rtw_phy_parsing_cfo_iterfunction rtw_phy_parsing_cfofunction rtw_phy_cfo_trackfunction rtw_phy_cck_pd_lv_unlinkfunction rtw_phy_cck_pd_lv_linkfunction rtw_phy_cck_pd_lvfunction rtw_phy_cck_pdfunction rtw_phy_pwr_trackfunction rtw_phy_ra_trackfunction rtw_phy_dynamic_mechanismfunction rtw_phy_power_2_dbfunction rtw_phy_db_2_linearfunction rtw_phy_linear_2_dbfunction rtw_phy_rf_power_2_rssifunction rtw_phy_read_rffunction rtw_phy_read_rf_sipi
Annotated Snippet
struct phy_cfg_pair {
u32 addr;
u32 data;
};
union phy_table_tile {
struct {
struct rtw_phy_cond cond;
struct rtw_phy_cond2 cond2;
} __packed;
struct phy_cfg_pair cfg;
};
static const u32 db_invert_table[12][8] = {
{10, 13, 16, 20,
25, 32, 40, 50},
{64, 80, 101, 128,
160, 201, 256, 318},
{401, 505, 635, 800,
1007, 1268, 1596, 2010},
{316, 398, 501, 631,
794, 1000, 1259, 1585},
{1995, 2512, 3162, 3981,
5012, 6310, 7943, 10000},
{12589, 15849, 19953, 25119,
31623, 39811, 50119, 63098},
{79433, 100000, 125893, 158489,
199526, 251189, 316228, 398107},
{501187, 630957, 794328, 1000000,
1258925, 1584893, 1995262, 2511886},
{3162278, 3981072, 5011872, 6309573,
7943282, 1000000, 12589254, 15848932},
{19952623, 25118864, 31622777, 39810717,
50118723, 63095734, 79432823, 100000000},
{125892541, 158489319, 199526232, 251188643,
316227766, 398107171, 501187234, 630957345},
{794328235, 1000000000, 1258925412, 1584893192,
1995262315, 2511886432U, 3162277660U, 3981071706U}
};
const u8 rtw_cck_rates[] = { DESC_RATE1M, DESC_RATE2M, DESC_RATE5_5M, DESC_RATE11M };
const u8 rtw_ofdm_rates[] = {
DESC_RATE6M, DESC_RATE9M, DESC_RATE12M,
DESC_RATE18M, DESC_RATE24M, DESC_RATE36M,
DESC_RATE48M, DESC_RATE54M
};
const u8 rtw_ht_1s_rates[] = {
DESC_RATEMCS0, DESC_RATEMCS1, DESC_RATEMCS2,
DESC_RATEMCS3, DESC_RATEMCS4, DESC_RATEMCS5,
DESC_RATEMCS6, DESC_RATEMCS7
};
const u8 rtw_ht_2s_rates[] = {
DESC_RATEMCS8, DESC_RATEMCS9, DESC_RATEMCS10,
DESC_RATEMCS11, DESC_RATEMCS12, DESC_RATEMCS13,
DESC_RATEMCS14, DESC_RATEMCS15
};
const u8 rtw_vht_1s_rates[] = {
DESC_RATEVHT1SS_MCS0, DESC_RATEVHT1SS_MCS1,
DESC_RATEVHT1SS_MCS2, DESC_RATEVHT1SS_MCS3,
DESC_RATEVHT1SS_MCS4, DESC_RATEVHT1SS_MCS5,
DESC_RATEVHT1SS_MCS6, DESC_RATEVHT1SS_MCS7,
DESC_RATEVHT1SS_MCS8, DESC_RATEVHT1SS_MCS9
};
const u8 rtw_vht_2s_rates[] = {
DESC_RATEVHT2SS_MCS0, DESC_RATEVHT2SS_MCS1,
DESC_RATEVHT2SS_MCS2, DESC_RATEVHT2SS_MCS3,
DESC_RATEVHT2SS_MCS4, DESC_RATEVHT2SS_MCS5,
DESC_RATEVHT2SS_MCS6, DESC_RATEVHT2SS_MCS7,
DESC_RATEVHT2SS_MCS8, DESC_RATEVHT2SS_MCS9
};
const u8 rtw_ht_3s_rates[] = {
DESC_RATEMCS16, DESC_RATEMCS17, DESC_RATEMCS18,
DESC_RATEMCS19, DESC_RATEMCS20, DESC_RATEMCS21,
DESC_RATEMCS22, DESC_RATEMCS23
};
const u8 rtw_ht_4s_rates[] = {
DESC_RATEMCS24, DESC_RATEMCS25, DESC_RATEMCS26,
DESC_RATEMCS27, DESC_RATEMCS28, DESC_RATEMCS29,
DESC_RATEMCS30, DESC_RATEMCS31
};
const u8 rtw_vht_3s_rates[] = {
DESC_RATEVHT3SS_MCS0, DESC_RATEVHT3SS_MCS1,
Annotation
- Immediate include surface: `linux/bcd.h`, `main.h`, `reg.h`, `fw.h`, `phy.h`, `debug.h`, `regd.h`, `sar.h`.
- Detected declarations: `struct phy_cfg_pair`, `struct rtw_phy_stat_iter_data`, `struct rtw_rx_addr_match_data`, `enum rtw_phy_band_type`, `function rtw_phy_cck_pd_init`, `function rtw_phy_set_edcca_th`, `function rtw_phy_adaptivity_set_mode`, `function rtw_phy_adaptivity_init`, `function rtw_phy_adaptivity`, `function rtw_phy_cfo_init`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.