drivers/net/wireless/realtek/rtw88/rtw8703b.c

Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw88/rtw8703b.c

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/realtek/rtw88/rtw8703b.c
Extension
.c
Size
61542 bytes
Lines
2009
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (ret == 0) {
			rtw_dbg(rtwdev, RTW_DBG_EFUSE,
				"got wifi mac address from DT: %pM\n",
				efuse->addr);
		}
	}
}

static int rtw8703b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map)
{
	struct rtw_efuse *efuse = &rtwdev->efuse;
	int ret;

	ret = rtw8723x_read_efuse(rtwdev, log_map);
	if (ret != 0)
		return ret;

	if (!is_valid_ether_addr(efuse->addr))
		try_mac_from_devicetree(rtwdev);

	return 0;
}

static void rtw8703b_pwrtrack_init(struct rtw_dev *rtwdev)
{
	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
	u8 path;

	/* TODO: The vendor driver selects these using tables in
	 * halrf_powertracking_ce.c, functions are called
	 * get_swing_index and get_cck_swing_index. There the current
	 * fixed values are only the defaults in case no match is
	 * found.
	 */
	dm_info->default_ofdm_index = 30;
	dm_info->default_cck_index = 20;

	for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) {
		ewma_thermal_init(&dm_info->avg_thermal[path]);
		dm_info->delta_power_index[path] = 0;
	}
	dm_info->pwr_trk_triggered = false;
	dm_info->pwr_trk_init_trigger = true;
	dm_info->thermal_meter_k = rtwdev->efuse.thermal_meter_k;
	dm_info->txagc_remnant_cck = 0;
	dm_info->txagc_remnant_ofdm[RF_PATH_A] = 0;
}

static void rtw8703b_phy_set_param(struct rtw_dev *rtwdev)
{
	u8 xtal_cap = rtwdev->efuse.crystal_cap & 0x3F;

	/* power on BB/RF domain */
	rtw_write16_set(rtwdev, REG_SYS_FUNC_EN,
			BIT_FEN_EN_25_1 | BIT_FEN_BB_GLB_RST | BIT_FEN_BB_RSTB);
	rtw_write8_set(rtwdev, REG_RF_CTRL,
		       BIT_RF_EN | BIT_RF_RSTB | BIT_RF_SDM_RSTB);
	rtw_write_rf(rtwdev, RF_PATH_A, RF_WLINT, RFREG_MASK, 0x0780);
	rtw_write8(rtwdev, REG_AFE_CTRL1 + 1, 0x80);

	rtw_phy_load_tables(rtwdev);

	rtw_write32_clr(rtwdev, REG_RCR, BIT_RCR_ADF);
	/* 0xff is from vendor driver, rtw8723d uses
	 * BIT_HIQ_NO_LMT_EN_ROOT.  Comment in vendor driver: "Packet
	 * in Hi Queue Tx immediately". I wonder if setting all bits
	 * is really necessary.
	 */
	rtw_write8_set(rtwdev, REG_HIQ_NO_LMT_EN, 0xff);
	rtw_write16_set(rtwdev, REG_AFE_CTRL_4, BIT_CK320M_AFE_EN | BIT_EN_SYN);

	rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL,
			 xtal_cap | (xtal_cap << 6));
	rtw_write32_set(rtwdev, REG_FPGA0_RFMOD, BIT_CCKEN | BIT_OFDMEN);

	/* Init EDCA */
	rtw_write16(rtwdev, REG_SPEC_SIFS, WLAN_SPEC_SIFS);
	rtw_write16(rtwdev, REG_MAC_SPEC_SIFS, WLAN_SPEC_SIFS);
	rtw_write16(rtwdev, REG_SIFS, WLAN_SPEC_SIFS); /* CCK */
	rtw_write16(rtwdev, REG_SIFS + 2, WLAN_SPEC_SIFS); /* OFDM */
	/* TXOP */
	rtw_write32(rtwdev, REG_EDCA_VO_PARAM, 0x002FA226);
	rtw_write32(rtwdev, REG_EDCA_VI_PARAM, 0x005EA324);
	rtw_write32(rtwdev, REG_EDCA_BE_PARAM, 0x005EA42B);
	rtw_write32(rtwdev, REG_EDCA_BK_PARAM, 0x0000A44F);

	/* Init retry */
	rtw_write8(rtwdev, REG_ACKTO, 0x40);

	/* Set up RX aggregation. sdio.c also sets DMA mode, but not

Annotation

Implementation Notes