drivers/net/wireless/realtek/rtw89/fw.h

File Facts

System

Linux kernel

Corpus path

drivers/net/wireless/realtek/rtw89/fw.h

Extension

.h

Size

177557 bytes

Lines

5840

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• core.h

Detected Declarations

• struct rtw89_c2hreg_hdr
• struct rtw89_c2hreg_phycap
• struct rtw89_h2creg_hdr
• struct rtw89_h2creg_sch_tx_en
• struct rtw89_mac_c2h_info
• struct rtw89_mac_h2c_info
• struct rtw89_fw_hdr_section_info
• struct rtw89_fw_bin_info
• struct rtw89_fw_macid_pause_grp
• struct rtw89_fw_macid_pause_sleep_grp
• struct rtw89_mac_chinfo_ax
• struct rtw89_mac_chinfo_be
• struct rtw89_pktofld_info
• struct rtw89_h2c_ra
• struct rtw89_h2c_ra_v1
• struct rtw89_h2c_ra_tx_history
• struct rtw89_h2c_ra_phy_ch_rpt
• struct rtw89_h2c_ra_drv_ctrl_fw
• struct rtw89_fw_dynhdr_sec
• struct rtw89_fw_dynhdr_hdr
• struct rtw89_fw_hdr_section
• struct rtw89_fw_hdr
• struct rtw89_fw_hdr_section_v1
• struct rtw89_fw_hdr_v1
• struct rtw89_fw_mss_pool_hdr
• struct rtw89_fw_blacklist
• struct rtw89_h2c_cctlinfo_ud_g7
• struct rtw89_h2c_cctlinfo_ud_be
• struct rtw89_h2c_bcn_upd
• struct rtw89_h2c_bcn_upd_be
• struct rtw89_h2c_tbtt_tuning
• struct rtw89_h2c_pwr_lvl
• struct rtw89_h2c_role_maintain
• struct rtw89_h2c_join
• struct rtw89_h2c_join_v1
• struct rtw89_h2c_notify_dbcc
• struct rtw89_h2c_ba_cam
• struct rtw89_h2c_ba_cam_v1
• struct rtw89_h2c_ba_cam_init
• struct rtw89_h2c_lps_ch_info
• struct rtw89_h2c_lps_ml_cmn_info
• struct rtw89_bb_link_info_rx_gain
• struct rtw89_h2c_lps_ml_cmn_info_v1
• struct rtw89_h2c_trig_cpu_except
• struct rtw89_h2c_wow_global
• struct rtw89_h2c_cfg_nlo
• struct rtw89_h2c_wow_wakeup_ctrl
• struct rtw89_h2c_wow_cam_update

Annotated Snippet

struct rtw89_c2hreg_hdr {
	u32 w0;
};

#define RTW89_C2HREG_HDR_FUNC_MASK GENMASK(6, 0)
#define RTW89_C2HREG_HDR_ACK BIT(7)
#define RTW89_C2HREG_HDR_LEN_MASK GENMASK(11, 8)
#define RTW89_C2HREG_HDR_SEQ_MASK GENMASK(15, 12)

struct rtw89_c2hreg_phycap {
	u32 w0;
	u32 w1;
	u32 w2;
	u32 w3;
} __packed;

#define RTW89_C2HREG_PHYCAP_W0_FUNC GENMASK(6, 0)
#define RTW89_C2HREG_PHYCAP_W0_ACK BIT(7)
#define RTW89_C2HREG_PHYCAP_W0_LEN GENMASK(11, 8)
#define RTW89_C2HREG_PHYCAP_W0_SEQ GENMASK(15, 12)
#define RTW89_C2HREG_PHYCAP_W0_RX_NSS GENMASK(23, 16)
#define RTW89_C2HREG_PHYCAP_W0_BW GENMASK(31, 24)
#define RTW89_C2HREG_PHYCAP_W1_TX_NSS GENMASK(7, 0)
#define RTW89_C2HREG_PHYCAP_W1_PROT GENMASK(15, 8)
#define RTW89_C2HREG_PHYCAP_W1_PROT_11N 1
#define RTW89_C2HREG_PHYCAP_W1_PROT_11AC 2
#define RTW89_C2HREG_PHYCAP_W1_PROT_11AX 3
#define RTW89_C2HREG_PHYCAP_W1_PROT_11BE 4
#define RTW89_C2HREG_PHYCAP_W1_NIC GENMASK(23, 16)
#define RTW89_C2HREG_PHYCAP_W1_WL_FUNC GENMASK(31, 24)
#define RTW89_C2HREG_PHYCAP_W2_HW_TYPE GENMASK(7, 0)
#define RTW89_C2HREG_PHYCAP_W3_ANT_TX_NUM GENMASK(15, 8)
#define RTW89_C2HREG_PHYCAP_W3_ANT_RX_NUM GENMASK(23, 16)
#define RTW89_C2HREG_PHYCAP_W3_BAND_SEL GENMASK(31, 24)

#define RTW89_C2HREG_PHYCAP_P1_W0_B1_RX_NSS GENMASK(23, 16)
#define RTW89_C2HREG_PHYCAP_P1_W0_B1_BW GENMASK(31, 24)
#define RTW89_C2HREG_PHYCAP_P1_W1_B1_TX_NSS GENMASK(7, 0)
#define RTW89_C2HREG_PHYCAP_P1_W1_B1_ANT_TX_NUM GENMASK(15, 8)
#define RTW89_C2HREG_PHYCAP_P1_W1_B1_ANT_RX_NUM GENMASK(23, 16)
#define RTW89_C2HREG_PHYCAP_P1_W1_B1_BAND_SEL GENMASK(31, 24)
#define RTW89_C2HREG_PHYCAP_P1_W2_QAM GENMASK(7, 0)
#define RTW89_C2HREG_PHYCAP_P1_W2_QAM_256  0x1
#define RTW89_C2HREG_PHYCAP_P1_W2_QAM_1024 0x2
#define RTW89_C2HREG_PHYCAP_P1_W2_QAM_4096 0x3
#define RTW89_C2HREG_PHYCAP_P1_W2_B1_QAM GENMASK(15, 8)

#define RTW89_C2HREG_AOAC_RPT_1_W0_KEY_IDX GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_1_W1_IV_0 GENMASK(7, 0)
#define RTW89_C2HREG_AOAC_RPT_1_W1_IV_1 GENMASK(15, 8)
#define RTW89_C2HREG_AOAC_RPT_1_W1_IV_2 GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_1_W1_IV_3 GENMASK(31, 24)
#define RTW89_C2HREG_AOAC_RPT_1_W2_IV_4 GENMASK(7, 0)
#define RTW89_C2HREG_AOAC_RPT_1_W2_IV_5 GENMASK(15, 8)
#define RTW89_C2HREG_AOAC_RPT_1_W2_IV_6 GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_1_W2_IV_7 GENMASK(31, 24)
#define RTW89_C2HREG_AOAC_RPT_1_W3_PTK_IV_0 GENMASK(7, 0)
#define RTW89_C2HREG_AOAC_RPT_1_W3_PTK_IV_1 GENMASK(15, 8)
#define RTW89_C2HREG_AOAC_RPT_1_W3_PTK_IV_2 GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_1_W3_PTK_IV_3 GENMASK(31, 24)
#define RTW89_C2HREG_AOAC_RPT_2_W0_PTK_IV_4 GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_2_W0_PTK_IV_5 GENMASK(31, 24)
#define RTW89_C2HREG_AOAC_RPT_2_W1_PTK_IV_6 GENMASK(7, 0)
#define RTW89_C2HREG_AOAC_RPT_2_W1_PTK_IV_7 GENMASK(15, 8)
#define RTW89_C2HREG_AOAC_RPT_2_W1_IGTK_IPN_IV_0 GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_2_W1_IGTK_IPN_IV_1 GENMASK(31, 24)
#define RTW89_C2HREG_AOAC_RPT_2_W2_IGTK_IPN_IV_2 GENMASK(7, 0)
#define RTW89_C2HREG_AOAC_RPT_2_W2_IGTK_IPN_IV_3 GENMASK(15, 8)
#define RTW89_C2HREG_AOAC_RPT_2_W2_IGTK_IPN_IV_4 GENMASK(23, 16)
#define RTW89_C2HREG_AOAC_RPT_2_W2_IGTK_IPN_IV_5 GENMASK(31, 24)
#define RTW89_C2HREG_AOAC_RPT_2_W3_IGTK_IPN_IV_6 GENMASK(7, 0)
#define RTW89_C2HREG_AOAC_RPT_2_W3_IGTK_IPN_IV_7 GENMASK(15, 8)

#define RTW89_C2HREG_PS_LEAVE_ACK_RET GENMASK(7, 0)
#define RTW89_C2HREG_PS_LEAVE_ACK_MACID GENMASK(31, 16)

struct rtw89_h2creg_hdr {
	u32 w0;
};

#define RTW89_H2CREG_HDR_FUNC_MASK GENMASK(6, 0)
#define RTW89_H2CREG_HDR_LEN_MASK GENMASK(11, 8)

struct rtw89_h2creg_sch_tx_en {
	u32 w0;
	u32 w1;
} __packed;

#define RTW89_H2CREG_SCH_TX_EN_W0_EN GENMASK(31, 16)
#define RTW89_H2CREG_SCH_TX_EN_W1_MASK GENMASK(15, 0)

Annotation

• Immediate include surface: `core.h`.
• Detected declarations: `struct rtw89_c2hreg_hdr`, `struct rtw89_c2hreg_phycap`, `struct rtw89_h2creg_hdr`, `struct rtw89_h2creg_sch_tx_en`, `struct rtw89_mac_c2h_info`, `struct rtw89_mac_h2c_info`, `struct rtw89_fw_hdr_section_info`, `struct rtw89_fw_bin_info`, `struct rtw89_fw_macid_pause_grp`, `struct rtw89_fw_macid_pause_sleep_grp`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.