drivers/net/wireless/realtek/rtw89/phy.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw89/phy.c- Extension
.c- Size
- 264247 bytes
- Lines
- 8993
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
acpi.hchan.hcoex.hdebug.hfw.hmac.hphy.hps.hreg.hsar.htxrx.hutil.h
Detected Declarations
struct rtw89_phy_iter_ra_datastruct rtw89_phy_ul_tb_check_datastruct rtw89_phy_power_diffstruct rtw89_phy_iter_rssi_datastruct rtw89_phy_iter_mcc_digstruct rfk_chan_iter_dataenum __rtw89_hw_rate_invalid_basesenum rtw89_phy_bb_rxsc_start_idxfunction rtw89_phy0_phy1_offsetfunction get_max_amsdu_lenfunction get_mcs_ra_maskfunction get_he_ra_maskfunction get_eht_mcs_ra_maskfunction get_eht_ra_maskfunction rtw89_phy_ra_mask_rssifunction rtw89_phy_ra_mask_recoverfunction rtw89_phy_ra_mask_cfgfunction rtw89_phy_ra_gi_ltffunction rtw89_phy_ra_sta_updatefunction rtw89_phy_ra_update_sta_linkfunction rtw89_phy_ra_update_stafunction __check_rate_patternfunction __rtw89_phy_rate_pattern_viffunction rtw89_phy_rate_pattern_viffunction rtw89_phy_ra_update_sta_iterfunction rtw89_phy_ra_updatefunction rtw89_phy_ra_assocfunction rtw89_phy_ra_recalc_agg_limitfunction for_each_stationfunction rtw89_phy_get_txscfunction rtw89_phy_get_txsbfunction rtw89_phy_check_swsi_busyfunction rtw89_phy_read_rffunction rtw89_phy_read_rf_afunction rtw89_phy_read_rf_v1function rtw89_phy_read_full_rf_v2_afunction rtw89_phy_read_rf_v2_afunction rtw89_phy_read_rf_v2function rtw89_phy_read_full_rf_v3_afunction rtw89_phy_read_rf_v3_afunction rtw89_phy_read_rf_v3function rtw89_phy_write_rffunction rtw89_phy_write_rf_afunction rtw89_phy_write_rf_v1function rtw89_phy_write_full_rf_v2_afunction rtw89_phy_write_rf_a_v2function rtw89_phy_write_rf_v2function rtw89_phy_write_full_rf_v3_a
Annotated Snippet
struct rtw89_phy_iter_ra_data {
struct rtw89_dev *rtwdev;
struct sk_buff *c2h;
};
static void __rtw89_phy_c2h_ra_rpt_iter(struct rtw89_sta_link *rtwsta_link,
struct ieee80211_link_sta *link_sta,
struct rtw89_phy_iter_ra_data *ra_data,
bool *changed)
{
struct rtw89_dev *rtwdev = ra_data->rtwdev;
const struct rtw89_c2h_ra_rpt *c2h =
(const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data;
struct rtw89_ra_report *ra_report = &rtwsta_link->ra_report;
const struct rtw89_chip_info *chip = rtwdev->chip;
bool format_v1 = chip->chip_gen == RTW89_CHIP_BE;
u8 mode, rate, bw, giltf, mac_id;
u16 legacy_bitrate, amsdu_len;
u8 retry_ratio = 0;
bool valid;
u8 mcs = 0;
u8 t;
mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID);
if (mac_id != rtwsta_link->mac_id)
return;
rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS);
bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW);
giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF);
mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL);
if (format_v1) {
t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7);
rate |= u8_encode_bits(t, BIT(7));
t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2);
bw |= u8_encode_bits(t, BIT(2));
t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2);
mode |= u8_encode_bits(t, BIT(2));
retry_ratio = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_RETRY_RATIO);
}
if (mode == RTW89_RA_RPT_MODE_LEGACY) {
valid = rtw89_legacy_rate_to_bitrate(rtwdev, rate, &legacy_bitrate);
if (!valid)
return;
}
memset(&ra_report->txrate, 0, sizeof(ra_report->txrate));
switch (mode) {
case RTW89_RA_RPT_MODE_LEGACY:
ra_report->txrate.legacy = legacy_bitrate;
break;
case RTW89_RA_RPT_MODE_HT:
ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS;
if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw))
rate = RTW89_MK_HT_RATE(FIELD_GET(RTW89_RA_RATE_MASK_NSS, rate),
FIELD_GET(RTW89_RA_RATE_MASK_MCS, rate));
else
rate = FIELD_GET(RTW89_RA_RATE_MASK_HT_MCS, rate);
ra_report->txrate.mcs = rate;
if (giltf)
ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
mcs = ra_report->txrate.mcs & 0x07;
break;
case RTW89_RA_RPT_MODE_VHT:
ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS;
ra_report->txrate.mcs = format_v1 ?
u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1) :
u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS);
ra_report->txrate.nss = format_v1 ?
u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1 :
u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS) + 1;
if (giltf)
ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
mcs = ra_report->txrate.mcs;
break;
case RTW89_RA_RPT_MODE_HE:
ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS;
ra_report->txrate.mcs = format_v1 ?
u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1) :
u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS);
ra_report->txrate.nss = format_v1 ?
u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1 :
u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS) + 1;
if (giltf == RTW89_GILTF_2XHE08 || giltf == RTW89_GILTF_1XHE08)
ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8;
else if (giltf == RTW89_GILTF_2XHE16 || giltf == RTW89_GILTF_1XHE16)
ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6;
Annotation
- Immediate include surface: `acpi.h`, `chan.h`, `coex.h`, `debug.h`, `fw.h`, `mac.h`, `phy.h`, `ps.h`.
- Detected declarations: `struct rtw89_phy_iter_ra_data`, `struct rtw89_phy_ul_tb_check_data`, `struct rtw89_phy_power_diff`, `struct rtw89_phy_iter_rssi_data`, `struct rtw89_phy_iter_mcc_dig`, `struct rfk_chan_iter_data`, `enum __rtw89_hw_rate_invalid_bases`, `enum rtw89_phy_bb_rxsc_start_idx`, `function rtw89_phy0_phy1_offset`, `function get_max_amsdu_len`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.