drivers/net/wireless/realtek/rtw89/rtw8852a.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/rtw8852a.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw89/rtw8852a.c- Extension
.c- Size
- 77051 bytes
- Lines
- 2526
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
coex.hfw.hmac.hphy.hreg.hrtw8852a.hrtw8852a_rfk.hrtw8852a_table.htxrx.h
Detected Declarations
function rtw8852a_efuse_parsing_tssifunction rtw8852a_read_efusefunction rtw8852a_phycap_parsing_tssifunction rtw8852a_phycap_parsing_thermal_trimfunction rtw8852a_thermal_trimfunction rtw8852a_phycap_parsing_pa_bias_trimfunction rtw8852a_pa_bias_trimfunction rtw8852a_read_phycapfunction rtw8852a_power_trimfunction rtw8852a_set_channel_macfunction rtw8852a_ctrl_sco_cckfunction rtw8852a_ch_settingfunction rtw8852a_sco_mappingfunction rtw8852a_ctrl_chfunction rtw8852a_bw_settingfunction rtw8852a_ctrl_bwfunction rtw8852a_spur_eliminationfunction rtw8852a_bb_reset_allfunction rtw8852a_bb_reset_enfunction rtw8852a_bb_resetfunction rtw8852a_bb_macid_ctrl_initfunction rtw8852a_bb_sethwfunction rtw8852a_bbrst_for_rfkfunction rtw8852a_set_channel_bbfunction rtw8852a_set_channelfunction rtw8852a_dfs_enfunction rtw8852a_tssi_cont_enfunction rtw8852a_tssi_cont_en_phyidxfunction rtw8852a_adc_enfunction rtw8852a_set_channel_helpfunction rtw8852a_fem_setupfunction rtw8852a_rfk_initfunction rtw8852a_rfk_channelfunction rtw8852a_rfk_band_changedfunction rtw8852a_rfk_scanfunction rtw8852a_rfk_trackfunction rtw8852a_bb_cal_txpwr_reffunction rtw8852a_set_txpwr_ul_tb_offsetfunction rtw8852a_set_txpwr_reffunction rtw8852a_set_txpwrfunction rtw8852a_set_txpwr_ctrlfunction rtw8852a_init_txpwr_unitfunction rtw8852a_bb_set_plcp_txfunction rtw8852a_stop_pmac_txfunction rtw8852a_start_pmac_txfunction rtw8852a_bb_set_pmac_txfunction rtw8852a_bb_set_pmac_pkt_txfunction rtw8852a_bb_set_power
Annotated Snippet
if (!rtwdev->dbcc_en) {
rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_B);
if (is_2g)
rtw89_phy_write32_idx(rtwdev, R_P1_MODE,
B_P1_MODE_SEL,
1, phy_idx);
else
rtw89_phy_write32_idx(rtwdev, R_P1_MODE,
B_P1_MODE_SEL,
0, phy_idx);
} else {
if (is_2g)
rtw89_phy_write32_clr(rtwdev, R_2P4G_BAND,
B_2P4G_BAND_SEL);
else
rtw89_phy_write32_set(rtwdev, R_2P4G_BAND,
B_2P4G_BAND_SEL);
}
/* SCO compensate FC setting */
sco_comp = rtw8852a_sco_mapping(central_ch);
rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV,
sco_comp, phy_idx);
} else {
/* Path B */
rtw8852a_ch_setting(rtwdev, central_ch, RF_PATH_B);
if (is_2g)
rtw89_phy_write32_idx(rtwdev, R_P1_MODE,
B_P1_MODE_SEL,
1, phy_idx);
else
rtw89_phy_write32_idx(rtwdev, R_P1_MODE,
B_P1_MODE_SEL,
0, phy_idx);
/* SCO compensate FC setting */
sco_comp = rtw8852a_sco_mapping(central_ch);
rtw89_phy_write32_idx(rtwdev, R_FC0_BW, B_FC0_BW_INV,
sco_comp, phy_idx);
}
/* Band edge */
if (is_2g)
rtw89_phy_write32_idx(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 1,
phy_idx);
else
rtw89_phy_write32_idx(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 0,
phy_idx);
/* CCK parameters */
if (central_ch == 14) {
rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01,
0x3b13ff);
rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23,
0x1c42de);
rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45,
0xfdb0ad);
rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67,
0xf60f6e);
rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89,
0xfd8f92);
rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011);
rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c);
rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF,
0xfff00a);
} else {
rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01,
0x3d23ff);
rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23,
0x29b354);
rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfc1c8);
rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67,
0xfdb053);
rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89,
0xf86f9a);
rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB,
0xfaef92);
rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD,
0xfe5fcc);
rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF,
0xffdff5);
}
}
static void rtw8852a_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path)
{
u32 val = 0;
u32 adc_sel[2] = {0x12d0, 0x32d0};
u32 wbadc_sel[2] = {0x12ec, 0x32ec};
val = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK);
if (val == INV_RF_DATA) {
Annotation
- Immediate include surface: `coex.h`, `fw.h`, `mac.h`, `phy.h`, `reg.h`, `rtw8852a.h`, `rtw8852a_rfk.h`, `rtw8852a_table.h`.
- Detected declarations: `function rtw8852a_efuse_parsing_tssi`, `function rtw8852a_read_efuse`, `function rtw8852a_phycap_parsing_tssi`, `function rtw8852a_phycap_parsing_thermal_trim`, `function rtw8852a_thermal_trim`, `function rtw8852a_phycap_parsing_pa_bias_trim`, `function rtw8852a_pa_bias_trim`, `function rtw8852a_read_phycap`, `function rtw8852a_power_trim`, `function rtw8852a_set_channel_mac`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.