drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c- Extension
.c- Size
- 125761 bytes
- Lines
- 3867
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
coex.hdebug.hmac.hphy.hreg.hrtw8852a.hrtw8852a_rfk.hrtw8852a_rfk_table.hrtw8852a_table.h
Detected Declarations
enum rtw8852a_iqk_typeenum rtw8852a_dpk_idenum dpk_agc_stepfunction _kpathfunction _rfk_backup_bb_regfunction _rfk_backup_rf_regfunction _rfk_restore_bb_regfunction _rfk_restore_rf_regfunction _wait_rx_modefunction _dack_dumpfunction _afe_initfunction _addck_backupfunction _addck_reloadfunction _dack_backup_s0function _dack_backup_s1function _dack_reload_by_pathfunction _dack_reloadfunction _check_addcfunction _addckfunction _check_dadcfunction _dack_s0function _dack_s1function _dackfunction _dac_calfunction _iqk_read_fft_dbcc0function _iqk_read_xym_dbcc0function _iqk_read_txcfir_dbcc0function _iqk_read_rxcfir_dbcc0function _iqk_sramfunction _iqk_rxk_settingfunction _iqk_check_calfunction _iqk_one_shotfunction _rxk_group_selfunction _iqk_nbrxkfunction _iqk_rxclk_settingfunction _txk_group_selfunction _iqk_nbtxkfunction _lok_res_tablefunction _lok_finetune_checkfunction _iqk_lokfunction _iqk_txk_settingfunction _iqk_txclk_settingfunction _iqk_info_iqkfunction _iqk_by_pathfunction _iqk_get_ch_infofunction _iqk_start_iqkfunction _iqk_restorefunction _iqk_afebb_restore
Annotated Snippet
if (ktype == ID_TXK) {
_iqk_read_txcfir_dbcc0(rtwdev, path, 0x0);
_iqk_read_txcfir_dbcc0(rtwdev, path, 0x1);
_iqk_read_txcfir_dbcc0(rtwdev, path, 0x2);
_iqk_read_txcfir_dbcc0(rtwdev, path, 0x3);
} else {
_iqk_read_rxcfir_dbcc0(rtwdev, path, 0x0);
_iqk_read_rxcfir_dbcc0(rtwdev, path, 0x1);
_iqk_read_rxcfir_dbcc0(rtwdev, path, 0x2);
_iqk_read_rxcfir_dbcc0(rtwdev, path, 0x3);
}
}
rtw89_phy_write32_clr(rtwdev, addr_rfc_ctl, 0x20000000);
rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP);
return fail;
}
static bool _rxk_group_sel(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx, u8 path,
enum rtw89_chanctx_idx chanctx_idx)
{
struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;
static const u32 rxgn_a[4] = {0x18C, 0x1A0, 0x28C, 0x2A0};
static const u32 attc2_a[4] = {0x0, 0x0, 0x07, 0x30};
static const u32 attc1_a[4] = {0x7, 0x5, 0x1, 0x1};
static const u32 rxgn_g[4] = {0x1CC, 0x1E0, 0x2CC, 0x2E0};
static const u32 attc2_g[4] = {0x0, 0x15, 0x3, 0x1a};
static const u32 attc1_g[4] = {0x1, 0x0, 0x1, 0x0};
u8 gp = 0x0;
bool fail = false;
u32 rf0 = 0x0;
for (gp = 0; gp < 0x4; gp++) {
switch (iqk_info->iqk_band[path]) {
case RTW89_BAND_2G:
rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, rxgn_g[gp]);
rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, attc2_g[gp]);
rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, attc1_g[gp]);
break;
case RTW89_BAND_5G:
rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, rxgn_a[gp]);
rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C2, attc2_a[gp]);
rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_C1, attc1_a[gp]);
break;
default:
break;
}
rtw89_phy_write32_set(rtwdev, R_IQK_CFG, B_IQK_CFG_SET);
rf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK);
rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI,
rf0 | iqk_info->syn1to2);
rtw89_phy_write32_mask(rtwdev, R_IQK_COM, MASKDWORD, 0x40010100);
rtw89_phy_write32_clr(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR);
rtw89_phy_write32_set(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL);
rtw89_phy_write32_clr(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3);
rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp);
rtw89_phy_write32_mask(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_EN, 0x1);
rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP);
fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK, chanctx_idx);
rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(16 + gp + path * 4), fail);
}
switch (iqk_info->iqk_band[path]) {
case RTW89_BAND_2G:
rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x0);
rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0);
break;
case RTW89_BAND_5G:
rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0);
rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0);
rtw89_write_rf(rtwdev, path, RR_WLSEL, RR_WLSEL_AG, 0x0);
break;
default:
break;
}
iqk_info->nb_rxcfir[path] = 0x40000000;
rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8),
B_IQK_RES_RXCFIR, 0x5);
iqk_info->is_wb_rxiqk[path] = true;
return false;
}
static bool _iqk_nbrxk(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx, u8 path,
enum rtw89_chanctx_idx chanctx_idx)
{
struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;
Annotation
- Immediate include surface: `coex.h`, `debug.h`, `mac.h`, `phy.h`, `reg.h`, `rtw8852a.h`, `rtw8852a_rfk.h`, `rtw8852a_rfk_table.h`.
- Detected declarations: `enum rtw8852a_iqk_type`, `enum rtw8852a_dpk_id`, `enum dpk_agc_step`, `function _kpath`, `function _rfk_backup_bb_reg`, `function _rfk_backup_rf_reg`, `function _rfk_restore_bb_reg`, `function _rfk_restore_rf_reg`, `function _wait_rx_mode`, `function _dack_dump`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.