drivers/net/wireless/realtek/rtw89/rtw8852b_common.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/rtw8852b_common.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw89/rtw8852b_common.c- Extension
.c- Size
- 72698 bytes
- Lines
- 2105
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
coex.hdebug.hmac.hphy.hreg.hrtw8852b_common.hsar.hutil.h
Detected Declarations
struct rtw8852bx_bb_gainfunction rtw8852bx_efuse_parsing_tssifunction _decode_efuse_gainfunction rtw8852bx_efuse_parsing_gain_offsetfunction __rtw8852bx_read_efusefunction rtw8852bx_phycap_parsing_power_calfunction rtw8852bx_phycap_parsing_tssifunction rtw8852bx_phycap_parsing_thermal_trimfunction rtw8852bx_thermal_trimfunction rtw8852bx_phycap_parsing_pa_bias_trimfunction rtw8852bx_pa_bias_trimfunction rtw8852bx_phycap_parsing_gain_compfunction __rtw8852bx_read_phycapfunction __rtw8852bx_power_trimfunction __rtw8852bx_set_channel_macfunction rtw8852bx_ctrl_sco_cckfunction rtw8852bx_sco_mappingfunction rtw8852bx_set_gain_errorfunction rtw8852bt_ext_loss_avg_updatefunction rtw8852bx_set_gain_offsetfunction rtw8852bx_set_rxsc_rpl_compfunction rtw8852bx_ctrl_chfunction rtw8852b_bw_settingfunction rtw8852bt_adc_cfgfunction rtw8852bx_ctrl_bwfunction rtw8852bx_ctrl_cck_enfunction rtw8852bx_5m_maskfunction __rtw8852bx_bb_reset_allfunction rtw8852bx_bb_macid_ctrl_initfunction __rtw8852bx_bb_sethwfunction rtw8852bx_bb_set_popfunction rtw8852bt_spur_freqfunction rtw8852bt_set_csi_tone_idxfunction __rtw8852bx_set_channel_bbfunction rtw8852bx_bb_cal_txpwr_reffunction rtw8852bx_set_txpwr_reffunction rtw8852bx_bb_set_tx_shape_dfirfunction rtw8852bx_set_tx_shapefunction rtw8852bx_get_txpwr_sar_difffunction rtw8852bx_set_txpwr_difffunction __rtw8852bx_set_txpwrfunction __rtw8852bx_set_txpwr_ctrlfunction __rtw8852bx_set_txpwr_ul_tb_offsetfunction __rtw8852bx_init_txpwr_unitfunction __rtw8852bx_bb_set_plcp_txfunction rtw8852bx_stop_pmac_txfunction rtw8852bx_start_pmac_txfunction rtw8852bx_bb_set_pmac_tx
Annotated Snippet
struct rtw8852bx_bb_gain {
u32 gain_g[BB_PATH_NUM_8852BX];
u32 gain_a[BB_PATH_NUM_8852BX];
u32 gain_mask;
};
static const struct rtw8852bx_bb_gain bb_gain_lna[LNA_GAIN_NUM] = {
{ .gain_g = {0x4678, 0x475C}, .gain_a = {0x45DC, 0x4740},
.gain_mask = 0x00ff0000 },
{ .gain_g = {0x4678, 0x475C}, .gain_a = {0x45DC, 0x4740},
.gain_mask = 0xff000000 },
{ .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744},
.gain_mask = 0x000000ff },
{ .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744},
.gain_mask = 0x0000ff00 },
{ .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744},
.gain_mask = 0x00ff0000 },
{ .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744},
.gain_mask = 0xff000000 },
{ .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748},
.gain_mask = 0x000000ff },
};
static const struct rtw8852bx_bb_gain bb_gain_tia[TIA_GAIN_NUM] = {
{ .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748},
.gain_mask = 0x00ff0000 },
{ .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748},
.gain_mask = 0xff000000 },
};
static void rtw8852bx_set_gain_error(struct rtw89_dev *rtwdev,
enum rtw89_subband subband,
enum rtw89_rf_path path)
{
const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax;
u8 gain_band = rtw89_subband_to_bb_gain_band(subband);
s32 val;
u32 reg;
u32 mask;
int i;
for (i = 0; i < LNA_GAIN_NUM; i++) {
if (subband == RTW89_CH_2G)
reg = bb_gain_lna[i].gain_g[path];
else
reg = bb_gain_lna[i].gain_a[path];
mask = bb_gain_lna[i].gain_mask;
val = gain->lna_gain[gain_band][path][i];
rtw89_phy_write32_mask(rtwdev, reg, mask, val);
}
for (i = 0; i < TIA_GAIN_NUM; i++) {
if (subband == RTW89_CH_2G)
reg = bb_gain_tia[i].gain_g[path];
else
reg = bb_gain_tia[i].gain_a[path];
mask = bb_gain_tia[i].gain_mask;
val = gain->tia_gain[gain_band][path][i];
rtw89_phy_write32_mask(rtwdev, reg, mask, val);
}
}
static void rtw8852bt_ext_loss_avg_update(struct rtw89_dev *rtwdev,
s8 ext_loss_a, s8 ext_loss_b)
{
s8 ext_loss_avg;
u64 linear;
u8 pwrofst;
if (ext_loss_a == ext_loss_b) {
ext_loss_avg = ext_loss_a;
} else {
linear = rtw89_db_to_linear(abs(ext_loss_a - ext_loss_b)) + 1;
linear /= 2;
ext_loss_avg = rtw89_linear_to_db(linear);
ext_loss_avg += min(ext_loss_a, ext_loss_b);
}
pwrofst = max(DIV_ROUND_CLOSEST(ext_loss_avg, 4) + 16, EDCCA_PWROFST_DEFAULT);
rtw89_phy_write32_mask(rtwdev, R_PWOFST, B_PWOFST, pwrofst);
}
static void rtw8852bx_set_gain_offset(struct rtw89_dev *rtwdev,
enum rtw89_subband subband,
enum rtw89_phy_idx phy_idx)
{
static const u32 gain_err_addr[2] = {R_P0_AGC_RSVD, R_P1_AGC_RSVD};
Annotation
- Immediate include surface: `coex.h`, `debug.h`, `mac.h`, `phy.h`, `reg.h`, `rtw8852b_common.h`, `sar.h`, `util.h`.
- Detected declarations: `struct rtw8852bx_bb_gain`, `function rtw8852bx_efuse_parsing_tssi`, `function _decode_efuse_gain`, `function rtw8852bx_efuse_parsing_gain_offset`, `function __rtw8852bx_read_efuse`, `function rtw8852bx_phycap_parsing_power_cal`, `function rtw8852bx_phycap_parsing_tssi`, `function rtw8852bx_phycap_parsing_thermal_trim`, `function rtw8852bx_thermal_trim`, `function rtw8852bx_phycap_parsing_pa_bias_trim`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.