drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c- Extension
.c- Size
- 140645 bytes
- Lines
- 4284
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
chan.hcoex.hdebug.hfw.hmac.hphy.hreg.hrtw8852bt.hrtw8852bt_rfk.hrtw8852bt_rfk_table.hrtw8852b_common.h
Detected Declarations
enum rf_modeenum rtw8852bt_dpk_idenum dpk_agc_stepenum rtw8852bt_iqk_typeenum adc_ckenum dac_ckfunction _rfk_get_thermalfunction _rfk_backup_bb_regfunction _rfk_backup_kip_regfunction _rfk_backup_rf_regfunction _rfk_reload_bb_regfunction _rfk_reload_kip_regfunction _rfk_reload_rf_regfunction _kpathfunction _txck_forcefunction _rxck_forcefunction _rfk_bb_afe_settingfunction _rfk_bb_afe_restorefunction _set_rx_dckfunction _rx_dckfunction _rckfunction _drckfunction _dack_backup_s0function _dack_backup_s1function _dack_resetfunction _dack_reload_by_pathfunction _dack_reloadfunction _dack_s0_pollfunction _dack_s0function _dack_s1_pollfunction _dack_s1function _dackfunction _dack_dumpfunction _addck_orifunction _addck_reloadfunction _dack_manual_offfunction _dac_calfunction _iqk_check_calfunction _iqk_one_shotfunction _iqk_txk_settingfunction _iqk_2g_lokfunction _iqk_5g_lokfunction _iqk_2g_txfunction _iqk_5g_txfunction _iqk_adc_fifo_rstfunction _iqk_rxclk_settingfunction _iqk_2g_rxfunction _iqk_5g_rx
Annotated Snippet
switch (step) {
case DPK_AGC_STEP_SYNC_DGAIN:
_dpk_sync(rtwdev, phy, path, kidx);
if (agc_cnt == 0) {
if (chan->band_width < 2)
_dpk_bypass_rxcfir(rtwdev, path, true);
else
_dpk_lbk_rxiqk(rtwdev, phy, path,
tmp_rxbb, rf_18);
}
if (_dpk_sync_check(rtwdev, path, kidx) == true) {
tmp_txagc = 0xff;
goout = 1;
break;
}
dgain = _dpk_dgain_read(rtwdev);
offset = _dpk_dgain_mapping(rtwdev, dgain);
if (loss_only == 1 || limited_rxbb == 1 || offset == 0)
step = DPK_AGC_STEP_GAIN_LOSS_IDX;
else
step = DPK_AGC_STEP_GAIN_ADJ;
break;
case DPK_AGC_STEP_GAIN_ADJ:
tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB);
if (tmp_rxbb + offset > 0x1f) {
tmp_rxbb = 0x1f;
limited_rxbb = 1;
} else if (tmp_rxbb + offset < 0) {
tmp_rxbb = 0;
limited_rxbb = 1;
} else {
tmp_rxbb = tmp_rxbb + offset;
}
rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB, tmp_rxbb);
rtw89_debug(rtwdev, RTW89_DBG_RFK,
"[DPK] Adjust RXBB (%d) = 0x%x\n", offset, tmp_rxbb);
if (chan->band_width == RTW89_CHANNEL_WIDTH_80)
_dpk_lbk_rxiqk(rtwdev, phy, path, tmp_rxbb, rf_18);
if (dgain > 1922 || dgain < 342)
step = DPK_AGC_STEP_SYNC_DGAIN;
else
step = DPK_AGC_STEP_GAIN_LOSS_IDX;
agc_cnt++;
break;
case DPK_AGC_STEP_GAIN_LOSS_IDX:
_dpk_gainloss(rtwdev, phy, path, kidx);
tmp_gl_idx = _dpk_gainloss_read(rtwdev);
if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, path, true)) ||
tmp_gl_idx >= 7)
step = DPK_AGC_STEP_GL_GT_CRITERION;
else if (tmp_gl_idx == 0)
step = DPK_AGC_STEP_GL_LT_CRITERION;
else
step = DPK_AGC_STEP_SET_TX_GAIN;
gl_cnt++;
break;
case DPK_AGC_STEP_GL_GT_CRITERION:
if (tmp_txagc == 0x2e ||
tmp_txagc == dpk->max_dpk_txagc[path]) {
goout = 1;
rtw89_debug(rtwdev, RTW89_DBG_RFK,
"[DPK] Txagc@lower bound!!\n");
} else {
tmp_txagc = _dpk_set_offset(rtwdev, phy, path,
tmp_txagc, 0x3);
}
step = DPK_AGC_STEP_GAIN_LOSS_IDX;
agc_cnt++;
break;
case DPK_AGC_STEP_GL_LT_CRITERION:
if (tmp_txagc == 0x3f || tmp_txagc == dpk->max_dpk_txagc[path]) {
goout = 1;
rtw89_debug(rtwdev, RTW89_DBG_RFK,
"[DPK] Txagc@upper bound!!\n");
} else {
tmp_txagc = _dpk_set_offset(rtwdev, phy, path,
tmp_txagc, 0xfe);
}
step = DPK_AGC_STEP_GAIN_LOSS_IDX;
Annotation
- Immediate include surface: `chan.h`, `coex.h`, `debug.h`, `fw.h`, `mac.h`, `phy.h`, `reg.h`, `rtw8852bt.h`.
- Detected declarations: `enum rf_mode`, `enum rtw8852bt_dpk_id`, `enum dpk_agc_step`, `enum rtw8852bt_iqk_type`, `enum adc_ck`, `enum dac_ck`, `function _rfk_get_thermal`, `function _rfk_backup_bb_reg`, `function _rfk_backup_kip_reg`, `function _rfk_backup_rf_reg`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.