drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c- Extension
.c- Size
- 11382 bytes
- Lines
- 382
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
chan.hdebug.hmac.hphy.hreg.hrtw8922a.hrtw8922a_rfk.h
Detected Declarations
enum _rf_syn_powfunction rtw8922a_tssi_cont_enfunction rtw8922a_tssi_cont_en_phyidxfunction rtw8922a_ctl_band_ch_bwfunction rtw8922a_set_channel_rffunction rtw8922a_set_syn01_cavfunction rtw8922a_set_syn01_cbvfunction rtw8922a_set_syn01function rtw8922a_chlk_ktbl_selfunction rtw8922a_chlk_reload_sel_tbl_v0function rtw8922a_chlk_reload_sel_tbl_v1function rtw8922a_chlk_reload_sel_tblfunction rtw8922a_chlk_reloadfunction rtw8922a_rfk_mlo_ctrlfunction rtw8922a_rfk_pll_initfunction rtw8922a_rfk_hw_initfunction rtw8922a_pre_set_channel_rffunction rtw8922a_post_set_channel_rf
Annotated Snippet
if (rf_reg[path][i] == INV_RF_DATA) {
rtw89_warn(rtwdev,
"[RFK] Invalid RF_0x18 for Path-%d\n", path);
return;
}
rf_reg[path][i] &= ~(RR_CFGCH_BAND1 | RR_CFGCH_BW_V2 |
RR_CFGCH_BAND0 | RR_CFGCH_CH);
rf_reg[path][i] |= rtw89_chip_chan_to_rf18_val(rtwdev, chan);
rtw89_write_rf(rtwdev, path, rf_addr[i],
RFREG_MASK, rf_reg[path][i]);
fsleep(100);
}
}
if (hal->cv != CHIP_CAV)
return;
if (chan->band_type == RTW89_BAND_2G) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWE, RFREG_MASK, 0x80000);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWA, RFREG_MASK, 0x00003);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWD1, RFREG_MASK, 0x0c990);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWD0, RFREG_MASK, 0xebe38);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWE, RFREG_MASK, 0x00000);
} else {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWE, RFREG_MASK, 0x80000);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWA, RFREG_MASK, 0x00003);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWD1, RFREG_MASK, 0x0c190);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWD0, RFREG_MASK, 0xebe38);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWE, RFREG_MASK, 0x00000);
}
}
void rtw8922a_set_channel_rf(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
enum rtw89_phy_idx phy_idx)
{
rtw8922a_ctl_band_ch_bw(rtwdev, phy_idx, chan);
}
enum _rf_syn_pow {
RF_SYN_ON_OFF,
RF_SYN_OFF_ON,
RF_SYN_ALLON,
RF_SYN_ALLOFF,
};
static void rtw8922a_set_syn01_cav(struct rtw89_dev *rtwdev, enum _rf_syn_pow syn)
{
if (syn == RF_SYN_ALLON) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x2);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x3);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x2);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x3);
} else if (syn == RF_SYN_ON_OFF) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x2);
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x0);
} else if (syn == RF_SYN_OFF_ON) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x0);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x3);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x2);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x3);
} else if (syn == RF_SYN_ALLOFF) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x0);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN, 0x0);
}
}
static void rtw8922a_set_syn01_cbv(struct rtw89_dev *rtwdev, enum _rf_syn_pow syn)
{
if (syn == RF_SYN_ALLON) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0xf);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0xf);
} else if (syn == RF_SYN_ON_OFF) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0xf);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0x0);
} else if (syn == RF_SYN_OFF_ON) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0x0);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0xf);
} else if (syn == RF_SYN_ALLOFF) {
rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0x0);
rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0x0);
Annotation
- Immediate include surface: `chan.h`, `debug.h`, `mac.h`, `phy.h`, `reg.h`, `rtw8922a.h`, `rtw8922a_rfk.h`.
- Detected declarations: `enum _rf_syn_pow`, `function rtw8922a_tssi_cont_en`, `function rtw8922a_tssi_cont_en_phyidx`, `function rtw8922a_ctl_band_ch_bw`, `function rtw8922a_set_channel_rf`, `function rtw8922a_set_syn01_cav`, `function rtw8922a_set_syn01_cbv`, `function rtw8922a_set_syn01`, `function rtw8922a_chlk_ktbl_sel`, `function rtw8922a_chlk_reload_sel_tbl_v0`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.