drivers/net/wireless/realtek/rtw89/rtw8922d.c

Source file repositories/reference/linux-study-clean/drivers/net/wireless/realtek/rtw89/rtw8922d.c

File Facts

System: Linux kernel
Corpus path: drivers/net/wireless/realtek/rtw89/rtw8922d.c
Extension: .c
Size: 122682 bytes
Lines: 3467
Domain: Driver Families
Bucket: drivers/net
Inferred role: Driver Families: exported/initcall integration point
Status: integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

chan.h
coex.h
debug.h
efuse.h
mac.h
phy.h
reg.h
rtw8922d.h
rtw8922d_rfk.h
sar.h
util.h

Detected Declarations

struct rtw8922d_bb_gain
function rtw8922d_sel_bt_rx_path
function rtw8922d_sel_bt_rx_phy
function rtw8922d_set_gbt_bt_rx_sel
function rtw8922d_pwr_on_func
function rtw8922d_pwr_off_func
function rtw8922d_efuse_parsing_tssi
function __rtw8922d_efuse_parsing_gain_offset
function rtw8922d_efuse_parsing_gain_offset
function rtw8922d_read_efuse_pci_sdio
function rtw8922d_read_efuse_usb
function rtw8922d_read_efuse_rf
function rtw8922d_read_efuse
function rtw8922d_phycap_parsing_vco_trim
function rtw8922d_vco_trim
function rtw8922d_phycap_parsing_thermal_trim
function rtw8922d_thermal_trim
function rtw8922d_phycap_parsing_pa_bias_trim
function rtw8922d_pa_bias_trim
function rtw8922d_phycap_parsing_pad_bias_trim
function rtw8922d_pad_bias_trim
function rtw8922d_read_phycap
function rtw8922d_power_trim
function rtw8922d_data_setup
function rtw8922d_set_channel_mac
function rtw8922d_ctrl_sco_cck
function rtw8922d_ctrl_ch_core
function rtw8922d_set_rpl_gain
function rtw8922d_set_lna_tia_gain
function rtw8922d_set_op1db
function rtw8922d_set_gain
function rtw8922d_get_rx_gain_by_chan
function rtw8922d_calc_rx_gain_normal_cck
function rtw8922d_set_rx_gain_normal_cck
function rtw8922d_calc_rx_gain_normal_ofdm
function rtw8922d_set_rx_gain_normal_ofdm
function rtw8922d_set_rx_gain_normal
function rtw8922d_calc_rx_gain_normal
function rtw8922d_set_cck_parameters
function rtw8922d_ctrl_ch
function rtw8922d_ctrl_bw
function rtw8922d_spur_freq
function rtw8922d_set_csi_tone_idx
function rtw8922d_set_nbi_tone_idx
function rtw8922d_spur_elimination
function rtw8922d_bb_preinit
function rtw8922d_bb_postinit
function rtw8922d_bb_reset_en

Annotated Snippet

struct rtw8922d_bb_gain {
	u32 gain_g[BB_PATH_NUM_8922D];
	u32 gain_a[BB_PATH_NUM_8922D];
	u32 gain_g_mask;
	u32 gain_a_mask;
};

static const struct rtw89_reg_def rpl_comp_bw160[RTW89_BW20_SC_160M] = {
	{ .addr = 0x241E8, .mask = 0xFF00},
	{ .addr = 0x241E8, .mask = 0xFF0000},
	{ .addr = 0x241E8, .mask = 0xFF000000},
	{ .addr = 0x241EC, .mask = 0xFF},
	{ .addr = 0x241EC, .mask = 0xFF00},
	{ .addr = 0x241EC, .mask = 0xFF0000},
	{ .addr = 0x241EC, .mask = 0xFF000000},
	{ .addr = 0x241F0, .mask = 0xFF}
};

static const struct rtw89_reg_def rpl_comp_bw80[RTW89_BW20_SC_80M] = {
	{ .addr = 0x241F4, .mask = 0xFF},
	{ .addr = 0x241F4, .mask = 0xFF00},
	{ .addr = 0x241F4, .mask = 0xFF0000},
	{ .addr = 0x241F4, .mask = 0xFF000000}
};

static const struct rtw89_reg_def rpl_comp_bw40[RTW89_BW20_SC_40M] = {
	{ .addr = 0x241F0, .mask = 0xFF0000},
	{ .addr = 0x241F0, .mask = 0xFF000000}
};

static const struct rtw89_reg_def rpl_comp_bw20[RTW89_BW20_SC_20M] = {
	{ .addr = 0x241F0, .mask = 0xFF00}
};

static const struct rtw8922d_bb_gain bb_gain_lna[LNA_GAIN_NUM] = {
	{ .gain_g = {0x2409C, 0x2449C}, .gain_a = {0x2406C, 0x2446C},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
	{ .gain_g = {0x2409C, 0x2449C}, .gain_a = {0x2406C, 0x2446C},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF0000},
	{ .gain_g = {0x240A0, 0x244A0}, .gain_a = {0x24070, 0x24470},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
	{ .gain_g = {0x240A0, 0x244A0}, .gain_a = {0x24070, 0x24470},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF0000},
	{ .gain_g = {0x240A4, 0x244A4}, .gain_a = {0x24074, 0x24474},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
	{ .gain_g = {0x240A4, 0x244A4}, .gain_a = {0x24074, 0x24474},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF0000},
	{ .gain_g = {0x240A8, 0x244A8}, .gain_a = {0x24078, 0x24478},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
};

static const struct rtw8922d_bb_gain bb_gain_tia[TIA_GAIN_NUM] = {
	{ .gain_g = {0x24054, 0x24454}, .gain_a = {0x24054, 0x24454},
	  .gain_g_mask = 0x7FC0000, .gain_a_mask = 0x1FF},
	{ .gain_g = {0x24058, 0x24458}, .gain_a = {0x24054, 0x24454},
	  .gain_g_mask = 0x1FF, .gain_a_mask = 0x3FE00 },
};

static const struct rtw8922d_bb_gain bb_op1db_lna[LNA_GAIN_NUM] = {
	{ .gain_g = {0x240AC, 0x244AC}, .gain_a = {0x24078, 0x24478},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF000000},
	{ .gain_g = {0x240AC, 0x244AC}, .gain_a = {0x2407C, 0x2447C},
	  .gain_g_mask = 0xFF0000, .gain_a_mask = 0xFF},
	{ .gain_g = {0x240AC, 0x244AC}, .gain_a = {0x2407C, 0x2447C},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF00},
	{ .gain_g = {0x240B0, 0x244B0}, .gain_a = {0x2407C, 0x2447C},
	  .gain_g_mask = 0xFF, .gain_a_mask = 0xFF0000},
	{ .gain_g = {0x240B0, 0x244B0}, .gain_a = {0x2407C, 0x2447C},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF000000},
	{ .gain_g = {0x240B0, 0x244B0}, .gain_a = {0x24080, 0x24480},
	  .gain_g_mask = 0xFF0000, .gain_a_mask = 0xFF},
	{ .gain_g = {0x240B0, 0x244B0}, .gain_a = {0x24080, 0x24480},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF00},
};

static const struct rtw8922d_bb_gain bb_op1db_tia_lna[TIA_LNA_OP1DB_NUM] = {
	{ .gain_g = {0x240B4, 0x244B4}, .gain_a = {0x24080, 0x24480},
	  .gain_g_mask = 0xFF0000, .gain_a_mask = 0xFF000000},
	{ .gain_g = {0x240B4, 0x244B4}, .gain_a = {0x24084, 0x24484},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF},
	{ .gain_g = {0x240B8, 0x244B8}, .gain_a = {0x24084, 0x24484},
	  .gain_g_mask = 0xFF, .gain_a_mask = 0xFF00},
	{ .gain_g = {0x240B8, 0x244B8}, .gain_a = {0x24084, 0x24484},
	  .gain_g_mask = 0xFF00, .gain_a_mask = 0xFF0000},
	{ .gain_g = {0x240B8, 0x244B8}, .gain_a = {0x24084, 0x24484},
	  .gain_g_mask = 0xFF0000, .gain_a_mask = 0xFF000000},
	{ .gain_g = {0x240B8, 0x244B8}, .gain_a = {0x24088, 0x24488},
	  .gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF},
	{ .gain_g = {0x240BC, 0x244BC}, .gain_a = {0x24088, 0x24488},
	  .gain_g_mask = 0xFF, .gain_a_mask = 0xFF00},

Annotation

Immediate include surface: `chan.h`, `coex.h`, `debug.h`, `efuse.h`, `mac.h`, `phy.h`, `reg.h`, `rtw8922d.h`.
Detected declarations: `struct rtw8922d_bb_gain`, `function rtw8922d_sel_bt_rx_path`, `function rtw8922d_sel_bt_rx_phy`, `function rtw8922d_set_gbt_bt_rx_sel`, `function rtw8922d_pwr_on_func`, `function rtw8922d_pwr_off_func`, `function rtw8922d_efuse_parsing_tssi`, `function __rtw8922d_efuse_parsing_gain_offset`, `function rtw8922d_efuse_parsing_gain_offset`, `function rtw8922d_read_efuse_pci_sdio`.
Atlas domain: Driver Families / drivers/net.
Implementation status: integration implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.