drivers/net/wireless/ti/wl12xx/main.c

Source file repositories/reference/linux-study-clean/drivers/net/wireless/ti/wl12xx/main.c

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/ti/wl12xx/main.c
Extension
.c
Size
54389 bytes
Lines
1967
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (time_after(jiffies, timeout)) {
			/* 1.2 check pWhalBus->uSelfClearTime if the
			 * timeout was reached */
			wl1271_error("soft reset timeout");
			return -1;
		}

		udelay(SOFT_RESET_STALL_TIME);
	}

	/* disable Rx/Tx */
	ret = wlcore_write32(wl, WL12XX_ENABLE, 0x0);
	if (ret < 0)
		goto out;

	/* disable auto calibration on start*/
	ret = wlcore_write32(wl, WL12XX_SPARE_A2, 0xffff);

out:
	return ret;
}

static int wl12xx_pre_boot(struct wl1271 *wl)
{
	struct wl12xx_priv *priv = wl->priv;
	int ret = 0;
	u32 clk;
	int selected_clock = -1;

	if (wl->chip.id == CHIP_ID_128X_PG20) {
		ret = wl128x_boot_clk(wl, &selected_clock);
		if (ret < 0)
			goto out;
	} else {
		ret = wl127x_boot_clk(wl);
		if (ret < 0)
			goto out;
	}

	/* Continue the ELP wake up sequence */
	ret = wlcore_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);
	if (ret < 0)
		goto out;

	udelay(500);

	ret = wlcore_set_partition(wl, &wl->ptable[PART_DRPW]);
	if (ret < 0)
		goto out;

	/* Read-modify-write DRPW_SCRATCH_START register (see next state)
	   to be used by DRPw FW. The RTRIM value will be added by the FW
	   before taking DRPw out of reset */

	ret = wlcore_read32(wl, WL12XX_DRPW_SCRATCH_START, &clk);
	if (ret < 0)
		goto out;

	wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);

	if (wl->chip.id == CHIP_ID_128X_PG20)
		clk |= ((selected_clock & 0x3) << 1) << 4;
	else
		clk |= (priv->ref_clock << 1) << 4;

	ret = wlcore_write32(wl, WL12XX_DRPW_SCRATCH_START, clk);
	if (ret < 0)
		goto out;

	ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
	if (ret < 0)
		goto out;

	/* Disable interrupts */
	ret = wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);
	if (ret < 0)
		goto out;

	ret = wl1271_boot_soft_reset(wl);
	if (ret < 0)
		goto out;

out:
	return ret;
}

static int wl12xx_pre_upload(struct wl1271 *wl)
{
	u32 tmp;
	u16 polarity;

Annotation

Implementation Notes