drivers/net/wireless/ti/wl18xx/conf.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ti/wl18xx/conf.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ti/wl18xx/conf.h- Extension
.h- Size
- 5564 bytes
- Lines
- 219
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct wl18xx_mac_and_phy_paramsstruct wl18xx_ht_settingsstruct conf_ap_sleep_settingsstruct wl18xx_priv_confenum wl18xx_ht_modeenum wl18xx_sg_params
Annotated Snippet
struct wl18xx_mac_and_phy_params {
u8 phy_standalone;
u8 spare0;
u8 enable_clpc;
u8 enable_tx_low_pwr_on_siso_rdl;
u8 auto_detect;
u8 dedicated_fem;
u8 low_band_component;
/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
u8 low_band_component_type;
u8 high_band_component;
/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
u8 high_band_component_type;
u8 number_of_assembled_ant2_4;
u8 number_of_assembled_ant5;
u8 pin_muxing_platform_options[PIN_MUXING_SIZE];
u8 external_pa_dc2dc;
u8 tcxo_ldo_voltage;
u8 xtal_itrim_val;
u8 srf_state;
u8 srf1[SRF_TABLE_LEN];
u8 srf2[SRF_TABLE_LEN];
u8 srf3[SRF_TABLE_LEN];
u8 io_configuration;
u8 sdio_configuration;
u8 settings;
u8 rx_profile;
u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG];
u8 pwr_limit_reference_11_abg;
u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P];
u8 pwr_limit_reference_11p;
u8 spare1;
u8 per_chan_bo_mode_11_abg[13];
u8 per_chan_bo_mode_11_p[4];
u8 primary_clock_setting_time;
u8 clock_valid_on_wake_up;
u8 secondary_clock_setting_time;
u8 board_type;
/* enable point saturation */
u8 psat;
/* low/medium/high Tx power in dBm for STA-HP BG */
s8 low_power_val;
s8 med_power_val;
s8 high_power_val;
s8 per_sub_band_tx_trace_loss[WL18XX_TRACE_LOSS_GAPS_TX];
s8 per_sub_band_rx_trace_loss[WL18XX_TRACE_LOSS_GAPS_RX];
u8 tx_rf_margin;
/* low/medium/high Tx power in dBm for other role */
s8 low_power_val_2nd;
s8 med_power_val_2nd;
s8 high_power_val_2nd;
u8 padding[1];
} __packed;
enum wl18xx_ht_mode {
/* Default - use MIMO, fallback to SISO20 */
HT_MODE_DEFAULT = 0,
/* Wide - use SISO40 */
HT_MODE_WIDE = 1,
/* Use SISO20 */
HT_MODE_SISO20 = 2,
};
struct wl18xx_ht_settings {
/* DEFAULT / WIDE / SISO20 */
u8 mode;
} __packed;
struct conf_ap_sleep_settings {
/* Duty Cycle (20-80% of staying Awake) for IDLE AP
* (0: disable)
*/
u8 idle_duty_cycle;
/* Duty Cycle (20-80% of staying Awake) for Connected AP
* (0: disable)
*/
u8 connected_duty_cycle;
/* Maximum stations that are allowed to be connected to AP
* (255: no limit)
*/
u8 max_stations_thresh;
/* Timeout till enabling the Sleep Mechanism after data stops
* [unit: 100 msec]
Annotation
- Detected declarations: `struct wl18xx_mac_and_phy_params`, `struct wl18xx_ht_settings`, `struct conf_ap_sleep_settings`, `struct wl18xx_priv_conf`, `enum wl18xx_ht_mode`, `enum wl18xx_sg_params`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.