drivers/net/wwan/iosm/iosm_ipc_chnl_cfg.h

File Facts

System

Linux kernel

Corpus path

drivers/net/wwan/iosm/iosm_ipc_chnl_cfg.h

Extension

.h

Size

1445 bytes

Lines

61

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• iosm_ipc_mux.h

Detected Declarations

• struct ipc_chnl_cfg
• enum ipc_channel_id

Annotated Snippet

struct ipc_chnl_cfg {
	u32 id;
	u32 ul_pipe;
	u32 dl_pipe;
	u32 ul_nr_of_entries;
	u32 dl_nr_of_entries;
	u32 dl_buf_size;
	u32 wwan_port_type;
	u32 accumulation_backoff;
};

/**
 * ipc_chnl_cfg_get - Get pipe configuration.
 * @chnl_cfg:		Array of ipc_chnl_cfg struct
 * @index:		Channel index (up to MAX_CHANNELS)
 *
 * Return: 0 on success and failure value on error
 */
int ipc_chnl_cfg_get(struct ipc_chnl_cfg *chnl_cfg, int index);

#endif

Annotation

• Immediate include surface: `iosm_ipc_mux.h`.
• Detected declarations: `struct ipc_chnl_cfg`, `enum ipc_channel_id`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.