drivers/net/wwan/iosm/Makefile

File Facts

System

Linux kernel

Corpus path

drivers/net/wwan/iosm/Makefile

Extension

[no extension]

Size

606 bytes

Lines

31

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: build/configuration rule

Status

atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only)
#
# Copyright (C) 2020-21 Intel Corporation.
#

iosm-y = \
	iosm_ipc_task_queue.o	\
	iosm_ipc_imem.o			\
	iosm_ipc_imem_ops.o		\
	iosm_ipc_mmio.o			\
	iosm_ipc_port.o			\
	iosm_ipc_wwan.o			\
	iosm_ipc_uevent.o		\
	iosm_ipc_pm.o			\
	iosm_ipc_pcie.o			\
	iosm_ipc_irq.o			\
	iosm_ipc_chnl_cfg.o		\
	iosm_ipc_protocol.o		\
	iosm_ipc_protocol_ops.o	\
	iosm_ipc_mux.o			\
	iosm_ipc_mux_codec.o		\
	iosm_ipc_devlink.o		\
	iosm_ipc_flash.o		\
	iosm_ipc_coredump.o

iosm-$(CONFIG_WWAN_DEBUGFS) += \
	iosm_ipc_debugfs.o		\
	iosm_ipc_trace.o

obj-$(CONFIG_IOSM) := iosm.o

Annotation

• Atlas domain: Driver Families / drivers/net.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.