drivers/net/wwan/t7xx/t7xx_hif_cldma.h
Source file repositories/reference/linux-study-clean/drivers/net/wwan/t7xx/t7xx_hif_cldma.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wwan/t7xx/t7xx_hif_cldma.h- Extension
.h- Size
- 3806 bytes
- Lines
- 134
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/device.hlinux/dmapool.hlinux/pci.hlinux/skbuff.hlinux/spinlock.hlinux/wait.hlinux/workqueue.hlinux/types.ht7xx_cldma.ht7xx_pci.h
Detected Declarations
struct cldma_gpdstruct cldma_requeststruct cldma_ringstruct cldma_queuestruct cldma_ctrlenum cldma_idenum cldma_cfg
Annotated Snippet
struct cldma_gpd {
u8 flags;
u8 not_used1;
__le16 rx_data_allow_len;
__le32 next_gpd_ptr_h;
__le32 next_gpd_ptr_l;
__le32 data_buff_bd_ptr_h;
__le32 data_buff_bd_ptr_l;
__le16 data_buff_len;
__le16 not_used2;
};
enum cldma_cfg {
CLDMA_SHARED_Q_CFG,
CLDMA_DEDICATED_Q_CFG,
};
struct cldma_request {
struct cldma_gpd *gpd; /* Virtual address for CPU */
dma_addr_t gpd_addr; /* Physical address for DMA */
struct sk_buff *skb;
dma_addr_t mapped_buff;
struct list_head entry;
};
struct cldma_ring {
struct list_head gpd_ring; /* Ring of struct cldma_request */
unsigned int length; /* Number of struct cldma_request */
int pkt_size;
};
struct cldma_queue {
struct cldma_ctrl *md_ctrl;
enum mtk_txrx dir;
unsigned int index;
struct cldma_ring *tr_ring;
struct cldma_request *tr_done;
struct cldma_request *rx_refill;
struct cldma_request *tx_next;
int budget; /* Same as ring buffer size by default */
spinlock_t ring_lock;
wait_queue_head_t req_wq; /* Only for TX */
struct workqueue_struct *worker;
struct work_struct cldma_work;
int (*recv_skb)(struct cldma_queue *queue, struct sk_buff *skb);
};
struct cldma_ctrl {
enum cldma_id hif_id;
struct device *dev;
struct t7xx_pci_dev *t7xx_dev;
struct cldma_queue txq[CLDMA_TXQ_NUM];
struct cldma_queue rxq[CLDMA_RXQ_NUM];
unsigned short txq_active;
unsigned short rxq_active;
unsigned short txq_started;
spinlock_t cldma_lock; /* Protects CLDMA structure */
/* Assumes T/R GPD/BD/SPD have the same size */
struct dma_pool *gpd_dmapool;
struct cldma_ring tx_ring[CLDMA_TXQ_NUM];
struct cldma_ring rx_ring[CLDMA_RXQ_NUM];
struct md_pm_entity *pm_entity;
struct t7xx_cldma_hw hw_info;
bool is_late_init;
};
#define CLDMA_Q_IDX_DUMP 1
#define GPD_FLAGS_HWO BIT(0)
#define GPD_FLAGS_IOC BIT(7)
#define GPD_DMAPOOL_ALIGN 16
int t7xx_cldma_alloc(enum cldma_id hif_id, struct t7xx_pci_dev *t7xx_dev);
void t7xx_cldma_hif_hw_init(struct cldma_ctrl *md_ctrl);
int t7xx_cldma_init(struct cldma_ctrl *md_ctrl);
void t7xx_cldma_exit(struct cldma_ctrl *md_ctrl);
void t7xx_cldma_switch_cfg(struct cldma_ctrl *md_ctrl, enum cldma_cfg cfg_id);
void t7xx_cldma_start(struct cldma_ctrl *md_ctrl);
int t7xx_cldma_stop(struct cldma_ctrl *md_ctrl);
void t7xx_cldma_reset(struct cldma_ctrl *md_ctrl);
int t7xx_cldma_send_skb(struct cldma_ctrl *md_ctrl, int qno, struct sk_buff *skb);
void t7xx_cldma_stop_all_qs(struct cldma_ctrl *md_ctrl, enum mtk_txrx tx_rx);
void t7xx_cldma_clear_all_qs(struct cldma_ctrl *md_ctrl, enum mtk_txrx tx_rx);
#endif /* __T7XX_HIF_CLDMA_H__ */
Annotation
- Immediate include surface: `linux/bits.h`, `linux/device.h`, `linux/dmapool.h`, `linux/pci.h`, `linux/skbuff.h`, `linux/spinlock.h`, `linux/wait.h`, `linux/workqueue.h`.
- Detected declarations: `struct cldma_gpd`, `struct cldma_request`, `struct cldma_ring`, `struct cldma_queue`, `struct cldma_ctrl`, `enum cldma_id`, `enum cldma_cfg`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.