drivers/nvmem/stm32-romem.c
Source file repositories/reference/linux-study-clean/drivers/nvmem/stm32-romem.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/nvmem/stm32-romem.c- Extension
.c- Size
- 7845 bytes
- Lines
- 313
- Domain
- Driver Families
- Bucket
- drivers/nvmem
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/arm-smccc.hlinux/io.hlinux/module.hlinux/nvmem-provider.hlinux/of.hlinux/platform_device.hlinux/property.hlinux/tee_drv.hstm32-bsec-optee-ta.h
Detected Declarations
struct stm32_romem_cfgstruct stm32_romem_privfunction stm32_romem_readfunction stm32_bsec_smcfunction stm32_bsec_readfunction stm32_bsec_writefunction stm32_bsec_pta_readfunction stm32_bsec_pta_writefunction stm32_bsec_smc_checkfunction optee_presence_checkfunction stm32_romem_probe
Annotated Snippet
struct stm32_romem_cfg {
int size;
u8 lower;
bool ta;
};
struct stm32_romem_priv {
void __iomem *base;
struct nvmem_config cfg;
u8 lower;
struct tee_context *ctx;
};
static int stm32_romem_read(void *context, unsigned int offset, void *buf,
size_t bytes)
{
struct stm32_romem_priv *priv = context;
u8 *buf8 = buf;
int i;
for (i = offset; i < offset + bytes; i++)
*buf8++ = readb_relaxed(priv->base + i);
return 0;
}
static int stm32_bsec_smc(u8 op, u32 otp, u32 data, u32 *result)
{
#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)
struct arm_smccc_res res;
arm_smccc_smc(STM32_SMC_BSEC, op, otp, data, 0, 0, 0, 0, &res);
if (res.a0)
return -EIO;
if (result)
*result = (u32)res.a1;
return 0;
#else
return -ENXIO;
#endif
}
static int stm32_bsec_read(void *context, unsigned int offset, void *buf,
size_t bytes)
{
struct stm32_romem_priv *priv = context;
struct device *dev = priv->cfg.dev;
u32 roffset, rbytes, val;
u8 *buf8 = buf, *val8 = (u8 *)&val;
int i, j = 0, ret, skip_bytes, size;
/* Round unaligned access to 32-bits */
roffset = rounddown(offset, 4);
skip_bytes = offset & 0x3;
rbytes = roundup(bytes + skip_bytes, 4);
if (roffset + rbytes > priv->cfg.size)
return -EINVAL;
for (i = roffset; (i < roffset + rbytes); i += 4) {
u32 otp = i >> 2;
if (otp < priv->lower) {
/* read lower data from shadow registers */
val = readl_relaxed(
priv->base + STM32MP15_BSEC_DATA0 + i);
} else {
ret = stm32_bsec_smc(STM32_SMC_READ_SHADOW, otp, 0,
&val);
if (ret) {
dev_err(dev, "Can't read data%d (%d)\n", otp,
ret);
return ret;
}
}
/* skip first bytes in case of unaligned read */
if (skip_bytes)
size = min(bytes, (size_t)(4 - skip_bytes));
else
size = min(bytes, (size_t)4);
memcpy(&buf8[j], &val8[skip_bytes], size);
bytes -= size;
j += size;
skip_bytes = 0;
}
return 0;
}
Annotation
- Immediate include surface: `linux/arm-smccc.h`, `linux/io.h`, `linux/module.h`, `linux/nvmem-provider.h`, `linux/of.h`, `linux/platform_device.h`, `linux/property.h`, `linux/tee_drv.h`.
- Detected declarations: `struct stm32_romem_cfg`, `struct stm32_romem_priv`, `function stm32_romem_read`, `function stm32_bsec_smc`, `function stm32_bsec_read`, `function stm32_bsec_write`, `function stm32_bsec_pta_read`, `function stm32_bsec_pta_write`, `function stm32_bsec_smc_check`, `function optee_presence_check`.
- Atlas domain: Driver Families / drivers/nvmem.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.