drivers/parisc/iosapic_private.h

Source file repositories/reference/linux-study-clean/drivers/parisc/iosapic_private.h

File Facts

System
Linux kernel
Corpus path
drivers/parisc/iosapic_private.h
Extension
.h
Size
5161 bytes
Lines
175
Domain
Driver Families
Bucket
drivers/parisc
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct irt_entry {

	/* Entry Type 139 identifies an I/O SAPIC interrupt entry */
	u8 entry_type;

	/* Entry Length 16 indicates entry is 16 bytes long */
	u8 entry_length;

	/* 
	** Interrupt Type of 0 indicates a vectored interrupt, 
	** all other values are reserved 
	*/
	u8 interrupt_type;

	/* 
	** PO and EL
	** Polarity of SAPIC I/O input signals: 
	**    00 = Reserved 
	**    01 = Active high 
	**    10 = Reserved 
	**    11 = Active low 
	** Trigger mode of SAPIC I/O input signals: 
	**    00 = Reserved 
	**    01 = Edge-triggered 
	**    10 = Reserved 
	**    11 = Level-triggered
	*/
	u8 polarity_trigger;

	/* 
	** IRQ and DEVNO
	** irq identifies PCI interrupt signal where
	**    0x0 corresponds to INT_A#, 
	**    0x1 corresponds to INT_B#, 
	**    0x2 corresponds to INT_C# 
	**    0x3 corresponds to INT_D# 
	** PCI device number where interrupt originates 
	*/
	u8 src_bus_irq_devno;

	/* Source Bus ID identifies the bus where interrupt signal comes from */
	u8 src_bus_id;

	/* 
	** Segment ID is unique across a protection domain and
	** identifies a segment of PCI buses (reserved in 
	** MP Specification Draft 1.5) 
	*/
	u8 src_seg_id;

	/* 
	** Destination I/O SAPIC INTIN# identifies the INTIN n pin 
	** to which the signal is connected 
	*/
	u8 dest_iosapic_intin;

	/* 
	** Destination I/O SAPIC Address identifies the I/O SAPIC 
	** to which the signal is connected 
	*/
	u64 dest_iosapic_addr;
};

#define IRT_IOSAPIC_TYPE   139
#define IRT_IOSAPIC_LENGTH 16

#define IRT_VECTORED_INTR  0

#define IRT_PO_MASK        0x3
#define IRT_ACTIVE_HI      1
#define IRT_ACTIVE_LO      3

#define IRT_EL_MASK        0x3
#define IRT_EL_SHIFT       2
#define IRT_EDGE_TRIG      1
#define IRT_LEVEL_TRIG     3

#define IRT_IRQ_MASK       0x3
#define IRT_DEV_MASK       0x1f
#define IRT_DEV_SHIFT      2

#define IRT_IRQ_DEVNO_MASK	((IRT_DEV_MASK << IRT_DEV_SHIFT) | IRT_IRQ_MASK)

#ifdef SUPPORT_MULTI_CELL
struct iosapic_irt {
        struct iosapic_irt *irt_next;  /* next routing table */
        struct irt_entry *irt_base;             /* intr routing table address */
        size_t  irte_count;            /* number of entries in the table */
        size_t  irte_size;             /* size (bytes) of each entry */
};

Annotation

Implementation Notes