drivers/pci/controller/cadence/pcie-cadence.c
Source file repositories/reference/linux-study-clean/drivers/pci/controller/cadence/pcie-cadence.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/controller/cadence/pcie-cadence.c- Extension
.c- Size
- 8482 bytes
- Lines
- 312
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/module.hlinux/of.hpcie-cadence.h../../pci.h
Detected Declarations
function cdns_pcie_find_capabilityfunction cdns_pcie_find_ext_capabilityfunction cdns_pcie_linkupfunction cdns_pcie_detect_quiet_min_delay_setfunction cdns_pcie_set_outbound_regionfunction cdns_pcie_set_outbound_region_for_normal_msgfunction cdns_pcie_reset_outbound_regionfunction cdns_pcie_disable_phyfunction cdns_pcie_enable_phyfunction cdns_pcie_init_phyfunction cdns_pcie_suspend_noirqfunction cdns_pcie_resume_noirqexport cdns_pcie_find_capabilityexport cdns_pcie_find_ext_capabilityexport cdns_pcie_linkupexport cdns_pcie_detect_quiet_min_delay_setexport cdns_pcie_set_outbound_regionexport cdns_pcie_set_outbound_region_for_normal_msgexport cdns_pcie_reset_outbound_regionexport cdns_pcie_disable_phyexport cdns_pcie_enable_phyexport cdns_pcie_init_phyexport cdns_pcie_pm_ops
Annotated Snippet
if (ret < 0) {
phy_exit(pcie->phy[i]);
goto err_phy;
}
}
return 0;
err_phy:
while (--i >= 0) {
phy_power_off(pcie->phy[i]);
phy_exit(pcie->phy[i]);
}
return ret;
}
EXPORT_SYMBOL_GPL(cdns_pcie_enable_phy);
int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie)
{
struct device_node *np = dev->of_node;
int phy_count;
struct phy **phy;
struct device_link **link;
int i;
int ret;
const char *name;
phy_count = of_property_count_strings(np, "phy-names");
if (phy_count < 1) {
dev_info(dev, "no \"phy-names\" property found; PHY will not be initialized\n");
pcie->phy_count = 0;
return 0;
}
phy = devm_kcalloc(dev, phy_count, sizeof(*phy), GFP_KERNEL);
if (!phy)
return -ENOMEM;
link = devm_kcalloc(dev, phy_count, sizeof(*link), GFP_KERNEL);
if (!link)
return -ENOMEM;
for (i = 0; i < phy_count; i++) {
of_property_read_string_index(np, "phy-names", i, &name);
phy[i] = devm_phy_get(dev, name);
if (IS_ERR(phy[i])) {
ret = PTR_ERR(phy[i]);
goto err_phy;
}
link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS);
if (!link[i]) {
devm_phy_put(dev, phy[i]);
ret = -EINVAL;
goto err_phy;
}
}
pcie->phy_count = phy_count;
pcie->phy = phy;
pcie->link = link;
ret = cdns_pcie_enable_phy(pcie);
if (ret)
goto err_phy;
return 0;
err_phy:
while (--i >= 0) {
device_link_del(link[i]);
devm_phy_put(dev, phy[i]);
}
return ret;
}
EXPORT_SYMBOL_GPL(cdns_pcie_init_phy);
static int cdns_pcie_suspend_noirq(struct device *dev)
{
struct cdns_pcie *pcie = dev_get_drvdata(dev);
cdns_pcie_disable_phy(pcie);
return 0;
}
static int cdns_pcie_resume_noirq(struct device *dev)
{
struct cdns_pcie *pcie = dev_get_drvdata(dev);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/module.h`, `linux/of.h`, `pcie-cadence.h`, `../../pci.h`.
- Detected declarations: `function cdns_pcie_find_capability`, `function cdns_pcie_find_ext_capability`, `function cdns_pcie_linkup`, `function cdns_pcie_detect_quiet_min_delay_set`, `function cdns_pcie_set_outbound_region`, `function cdns_pcie_set_outbound_region_for_normal_msg`, `function cdns_pcie_reset_outbound_region`, `function cdns_pcie_disable_phy`, `function cdns_pcie_enable_phy`, `function cdns_pcie_init_phy`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.