drivers/pci/controller/cadence/pcie-cadence-ep.c

Source file repositories/reference/linux-study-clean/drivers/pci/controller/cadence/pcie-cadence-ep.c

File Facts

System
Linux kernel
Corpus path
drivers/pci/controller/cadence/pcie-cadence-ep.c
Extension
.c
Size
21869 bytes
Lines
776
Domain
Representative Device Path
Bucket
PCIe NVMe Storage Path
Inferred role
Representative Device Path: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.

Dependency Surface

Detected Declarations

Annotated Snippet

if (vfn > 0) {
			dev_err(dev, "Cannot raise INTX interrupts for VF\n");
			return -EINVAL;
		}
		return cdns_pcie_ep_send_intx_irq(ep, fn, vfn, 0);

	case PCI_IRQ_MSI:
		return cdns_pcie_ep_send_msi_irq(ep, fn, vfn, interrupt_num);

	case PCI_IRQ_MSIX:
		return cdns_pcie_ep_send_msix_irq(ep, fn, vfn, interrupt_num);

	default:
		break;
	}

	return -EINVAL;
}

static int cdns_pcie_ep_start(struct pci_epc *epc)
{
	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
	struct cdns_pcie *pcie = &ep->pcie;
	struct device *dev = pcie->dev;
	int max_epfs = sizeof(epc->function_num_map) * 8;
	int ret, epf, last_fn;
	u32 reg, value;
	u8 cap;

	cap = cdns_pcie_find_capability(pcie, PCI_CAP_ID_EXP);
	/*
	 * BIT(0) is hardwired to 1, hence function 0 is always enabled
	 * and can't be disabled anyway.
	 */
	cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, epc->function_num_map);

	/*
	 * Next function field in ARI_CAP_AND_CTR register for last function
	 * should be 0.  Clear Next Function Number field for the last
	 * function used.
	 */
	last_fn = find_last_bit(&epc->function_num_map, BITS_PER_LONG);
	reg     = CDNS_PCIE_CORE_PF_I_ARI_CAP_AND_CTRL(last_fn);
	value  = cdns_pcie_readl(pcie, reg);
	value &= ~CDNS_PCIE_ARI_CAP_NFN_MASK;
	cdns_pcie_writel(pcie, reg, value);

	if (ep->quirk_disable_flr) {
		for (epf = 0; epf < max_epfs; epf++) {
			if (!(epc->function_num_map & BIT(epf)))
				continue;

			value = cdns_pcie_ep_fn_readl(pcie, epf,
						      cap + PCI_EXP_DEVCAP);
			value &= ~PCI_EXP_DEVCAP_FLR;
			cdns_pcie_ep_fn_writel(pcie, epf,
					       cap + PCI_EXP_DEVCAP, value);
		}
	}

	ret = cdns_pcie_start_link(pcie);
	if (ret) {
		dev_err(dev, "Failed to start link\n");
		return ret;
	}

	return 0;
}

static const struct pci_epc_features cdns_pcie_epc_vf_features = {
	.msi_capable = true,
	.msix_capable = true,
	.align = 65536,
};

static const struct pci_epc_features cdns_pcie_epc_features = {
	.msi_capable = true,
	.msix_capable = true,
	.align = 256,
};

static const struct pci_epc_features*
cdns_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
{
	if (!vfunc_no)
		return &cdns_pcie_epc_features;

	return &cdns_pcie_epc_vf_features;
}

Annotation

Implementation Notes