drivers/pci/controller/dwc/pcie-designware-plat.c
Source file repositories/reference/linux-study-clean/drivers/pci/controller/dwc/pcie-designware-plat.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/controller/dwc/pcie-designware-plat.c- Extension
.c- Size
- 4144 bytes
- Lines
- 188
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: implementation source
- Status
- source implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/delay.hlinux/gpio.hlinux/interrupt.hlinux/kernel.hlinux/init.hlinux/of.hlinux/pci.hlinux/platform_device.hlinux/resource.hlinux/types.hpcie-designware.h
Detected Declarations
struct dw_plat_pciestruct dw_plat_pcie_of_datafunction dw_plat_pcie_ep_raise_irqfunction dw_plat_pcie_get_featuresfunction dw_plat_add_pcie_portfunction dw_plat_pcie_probe
Annotated Snippet
struct dw_plat_pcie {
struct dw_pcie *pci;
enum dw_pcie_device_mode mode;
};
struct dw_plat_pcie_of_data {
enum dw_pcie_device_mode mode;
};
static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
};
static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
unsigned int type, u16 interrupt_num)
{
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
switch (type) {
case PCI_IRQ_INTX:
return dw_pcie_ep_raise_intx_irq(ep, func_no);
case PCI_IRQ_MSI:
return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
case PCI_IRQ_MSIX:
return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num);
default:
dev_err(pci->dev, "UNKNOWN IRQ type\n");
}
return 0;
}
static const struct pci_epc_features dw_plat_pcie_epc_features = {
DWC_EPC_COMMON_FEATURES,
.msi_capable = true,
.msix_capable = true,
};
static const struct pci_epc_features*
dw_plat_pcie_get_features(struct dw_pcie_ep *ep)
{
return &dw_plat_pcie_epc_features;
}
static const struct dw_pcie_ep_ops pcie_ep_ops = {
.raise_irq = dw_plat_pcie_ep_raise_irq,
.get_features = dw_plat_pcie_get_features,
};
static int dw_plat_add_pcie_port(struct dw_plat_pcie *dw_plat_pcie,
struct platform_device *pdev)
{
struct dw_pcie *pci = dw_plat_pcie->pci;
struct dw_pcie_rp *pp = &pci->pp;
struct device *dev = &pdev->dev;
int ret;
pp->irq = platform_get_irq(pdev, 1);
if (pp->irq < 0)
return pp->irq;
pp->num_vectors = MAX_MSI_IRQS;
pp->ops = &dw_plat_pcie_host_ops;
ret = dw_pcie_host_init(pp);
if (ret) {
dev_err(dev, "Failed to initialize host\n");
return ret;
}
return 0;
}
static int dw_plat_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct dw_plat_pcie *dw_plat_pcie;
struct dw_pcie *pci;
int ret;
const struct dw_plat_pcie_of_data *data;
enum dw_pcie_device_mode mode;
data = of_device_get_match_data(dev);
if (!data)
return -EINVAL;
mode = (enum dw_pcie_device_mode)data->mode;
dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
if (!dw_plat_pcie)
return -ENOMEM;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/delay.h`, `linux/gpio.h`, `linux/interrupt.h`, `linux/kernel.h`, `linux/init.h`, `linux/of.h`, `linux/pci.h`.
- Detected declarations: `struct dw_plat_pcie`, `struct dw_plat_pcie_of_data`, `function dw_plat_pcie_ep_raise_irq`, `function dw_plat_pcie_get_features`, `function dw_plat_add_pcie_port`, `function dw_plat_pcie_probe`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.