drivers/pci/controller/dwc/pcie-dw-rockchip.c
Source file repositories/reference/linux-study-clean/drivers/pci/controller/dwc/pcie-dw-rockchip.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/controller/dwc/pcie-dw-rockchip.c- Extension
.c- Size
- 24932 bytes
- Lines
- 871
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: implementation source
- Status
- source implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/gpio/consumer.hlinux/hw_bitfield.hlinux/irqchip/chained_irq.hlinux/irqdomain.hlinux/mfd/syscon.hlinux/module.hlinux/of.hlinux/of_irq.hlinux/phy/phy.hlinux/platform_device.hlinux/regmap.hlinux/reset.hlinux/workqueue.htrace/events/pci_controller.h../../pci.hpcie-designware.h
Detected Declarations
struct rockchip_pciestruct rockchip_pcie_of_datafunction rockchip_pcie_readl_apbfunction rockchip_pcie_writel_apbfunction rockchip_pcie_intx_handlerfunction rockchip_intx_maskfunction rockchip_intx_unmaskfunction rockchip_pcie_intx_mapfunction rockchip_pcie_init_irq_domainfunction rockchip_pcie_get_ltssm_regfunction rockchip_pcie_get_ltssmfunction rockchip_pcie_ltssm_trace_workfunction rockchip_pcie_ltssm_tracefunction rockchip_pcie_ltssm_tracefunction rockchip_pcie_disable_ltssmfunction rockchip_pcie_link_upfunction rockchip_pcie_configure_l1ssfunction rockchip_pcie_enable_l0sfunction rockchip_pcie_start_linkfunction rockchip_pcie_stop_linkfunction rockchip_pcie_host_initfunction rockchip_pcie_ep_hide_broken_ats_cap_rk3588function rockchip_pcie_ep_initfunction rockchip_pcie_raise_irqfunction rockchip_pcie_get_featuresfunction rockchip_pcie_clk_initfunction rockchip_pcie_resource_getfunction rockchip_pcie_phy_initfunction rockchip_pcie_phy_deinitfunction rockchip_pcie_ep_sys_irq_threadfunction rockchip_pcie_configure_rcfunction rockchip_pcie_configure_epfunction rockchip_pcie_probe
Annotated Snippet
struct rockchip_pcie {
struct dw_pcie pci;
void __iomem *apb_base;
struct phy *phy;
struct clk_bulk_data *clks;
unsigned int clk_cnt;
struct reset_control *rst;
struct gpio_desc *rst_gpio;
struct irq_domain *irq_domain;
const struct rockchip_pcie_of_data *data;
bool supports_clkreq;
struct delayed_work trace_work;
};
struct rockchip_pcie_of_data {
enum dw_pcie_device_mode mode;
const struct pci_epc_features *epc_features;
};
static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg)
{
return readl_relaxed(rockchip->apb_base + reg);
}
static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, u32 val,
u32 reg)
{
writel_relaxed(val, rockchip->apb_base + reg);
}
static void rockchip_pcie_intx_handler(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);
unsigned long reg, hwirq;
chained_irq_enter(chip, desc);
reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY);
for_each_set_bit(hwirq, ®, 4)
generic_handle_domain_irq(rockchip->irq_domain, hwirq);
chained_irq_exit(chip, desc);
}
static void rockchip_intx_mask(struct irq_data *data)
{
rockchip_pcie_writel_apb(irq_data_get_irq_chip_data(data),
PCIE_INTR_LEGACY_MASK(data->hwirq),
PCIE_CLIENT_INTR_MASK_LEGACY);
};
static void rockchip_intx_unmask(struct irq_data *data)
{
rockchip_pcie_writel_apb(irq_data_get_irq_chip_data(data),
PCIE_INTR_LEGACY_UNMASK(data->hwirq),
PCIE_CLIENT_INTR_MASK_LEGACY);
};
static struct irq_chip rockchip_intx_irq_chip = {
.name = "INTx",
.irq_mask = rockchip_intx_mask,
.irq_unmask = rockchip_intx_unmask,
.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
};
static int rockchip_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
irq_hw_number_t hwirq)
{
irq_set_chip_and_handler(irq, &rockchip_intx_irq_chip, handle_level_irq);
irq_set_chip_data(irq, domain->host_data);
return 0;
}
static const struct irq_domain_ops intx_domain_ops = {
.map = rockchip_pcie_intx_map,
};
static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->pci.dev;
struct device_node *intc;
intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller");
if (!intc) {
dev_err(dev, "missing child interrupt-controller node\n");
return -EINVAL;
}
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/gpio/consumer.h`, `linux/hw_bitfield.h`, `linux/irqchip/chained_irq.h`, `linux/irqdomain.h`, `linux/mfd/syscon.h`, `linux/module.h`.
- Detected declarations: `struct rockchip_pcie`, `struct rockchip_pcie_of_data`, `function rockchip_pcie_readl_apb`, `function rockchip_pcie_writel_apb`, `function rockchip_pcie_intx_handler`, `function rockchip_intx_mask`, `function rockchip_intx_unmask`, `function rockchip_pcie_intx_map`, `function rockchip_pcie_init_irq_domain`, `function rockchip_pcie_get_ltssm_reg`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.