drivers/pci/controller/pcie-rockchip.h
Source file repositories/reference/linux-study-clean/drivers/pci/controller/pcie-rockchip.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/controller/pcie-rockchip.h- Extension
.h- Size
- 14864 bytes
- Lines
- 354
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: implementation source
- Status
- source implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/hw_bitfield.hlinux/kernel.hlinux/pci.hlinux/pci-ecam.hlinux/reset.h
Detected Declarations
struct rockchip_pciefunction rockchip_pcie_readfunction rockchip_pcie_write
Annotated Snippet
struct rockchip_pcie {
void __iomem *reg_base; /* DT axi-base */
void __iomem *apb_base; /* DT apb-base */
bool legacy_phy;
struct phy *phys[MAX_LANE_NUM];
struct reset_control_bulk_data pm_rsts[ROCKCHIP_NUM_PM_RSTS];
struct reset_control_bulk_data core_rsts[ROCKCHIP_NUM_CORE_RSTS];
struct clk_bulk_data *clks;
int num_clks;
struct regulator *vpcie12v; /* 12V power supply */
struct regulator *vpcie3v3; /* 3.3V power supply */
struct regulator *vpcie1v8; /* 1.8V power supply */
struct regulator *vpcie0v9; /* 0.9V power supply */
struct gpio_desc *perst_gpio;
u32 lanes;
u8 lanes_map;
int link_gen;
struct device *dev;
struct irq_domain *irq_domain;
int offset;
void __iomem *msg_region;
phys_addr_t msg_bus_addr;
bool is_rc;
struct resource *mem_res;
};
static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)
{
return readl(rockchip->apb_base + reg);
}
static void rockchip_pcie_write(struct rockchip_pcie *rockchip, u32 val,
u32 reg)
{
writel(val, rockchip->apb_base + reg);
}
int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip);
int rockchip_pcie_init_port(struct rockchip_pcie *rockchip);
int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip);
void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip);
int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip);
void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip);
void rockchip_pcie_cfg_configuration_accesses(
struct rockchip_pcie *rockchip, u32 type);
#endif /* _PCIE_ROCKCHIP_H */
Annotation
- Immediate include surface: `linux/clk.h`, `linux/hw_bitfield.h`, `linux/kernel.h`, `linux/pci.h`, `linux/pci-ecam.h`, `linux/reset.h`.
- Detected declarations: `struct rockchip_pcie`, `function rockchip_pcie_read`, `function rockchip_pcie_write`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.