drivers/pci/controller/plda/pcie-plda.h
Source file repositories/reference/linux-study-clean/drivers/pci/controller/plda/pcie-plda.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/controller/plda/pcie-plda.h- Extension
.h- Size
- 8670 bytes
- Lines
- 275
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: implementation source
- Status
- source implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct plda_pcie_rpstruct plda_event_opsstruct plda_pcie_host_opsstruct plda_msistruct plda_pcie_rpstruct plda_eventenum plda_int_eventfunction plda_set_default_msifunction plda_pcie_enable_root_portfunction plda_pcie_set_standard_classfunction plda_pcie_set_pref_win_64bitfunction plda_pcie_disable_ltrfunction plda_pcie_disable_funcfunction plda_pcie_write_rc_bar
Annotated Snippet
struct plda_event_ops {
u32 (*get_events)(struct plda_pcie_rp *pcie);
};
struct plda_pcie_host_ops {
int (*host_init)(struct plda_pcie_rp *pcie);
void (*host_deinit)(struct plda_pcie_rp *pcie);
};
struct plda_msi {
struct mutex lock; /* Protect used bitmap */
struct irq_domain *dev_domain;
u32 num_vectors;
u64 vector_phy;
DECLARE_BITMAP(used, PLDA_MAX_NUM_MSI_IRQS);
};
struct plda_pcie_rp {
struct device *dev;
struct pci_host_bridge *bridge;
struct irq_domain *intx_domain;
struct irq_domain *event_domain;
raw_spinlock_t lock;
struct plda_msi msi;
const struct plda_event_ops *event_ops;
const struct irq_chip *event_irq_chip;
const struct plda_pcie_host_ops *host_ops;
void __iomem *bridge_addr;
void __iomem *config_base;
unsigned long events_bitmap;
int irq;
int msi_irq;
int intx_irq;
int num_events;
};
struct plda_event {
int (*request_event_irq)(struct plda_pcie_rp *pcie,
int event_irq, int event);
int intx_event;
int msi_event;
};
void __iomem *plda_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
int where);
int plda_init_interrupts(struct platform_device *pdev,
struct plda_pcie_rp *port,
const struct plda_event *event);
void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
phys_addr_t axi_addr, phys_addr_t pci_addr,
size_t size);
void plda_pcie_setup_inbound_address_translation(struct plda_pcie_rp *port);
int plda_pcie_setup_iomems(struct pci_host_bridge *bridge,
struct plda_pcie_rp *port);
int plda_pcie_host_init(struct plda_pcie_rp *port, struct pci_ops *ops,
const struct plda_event *plda_event);
void plda_pcie_host_deinit(struct plda_pcie_rp *pcie);
static inline void plda_set_default_msi(struct plda_msi *msi)
{
msi->vector_phy = IMSI_ADDR;
msi->num_vectors = PLDA_MAX_NUM_MSI_IRQS;
}
static inline void plda_pcie_enable_root_port(struct plda_pcie_rp *plda)
{
u32 value;
value = readl_relaxed(plda->bridge_addr + GEN_SETTINGS);
value |= RP_ENABLE;
writel_relaxed(value, plda->bridge_addr + GEN_SETTINGS);
}
static inline void plda_pcie_set_standard_class(struct plda_pcie_rp *plda)
{
u32 value;
/* set class code and reserve revision id */
value = readl_relaxed(plda->bridge_addr + PCIE_PCI_IDS_DW1);
value &= REVISION_ID_MASK;
value |= (PCI_CLASS_BRIDGE_PCI << IDS_CLASS_CODE_SHIFT);
writel_relaxed(value, plda->bridge_addr + PCIE_PCI_IDS_DW1);
}
static inline void plda_pcie_set_pref_win_64bit(struct plda_pcie_rp *plda)
{
u32 value;
value = readl_relaxed(plda->bridge_addr + PCIE_WINROM);
value |= PREF_MEM_WIN_64_SUPPORT;
Annotation
- Detected declarations: `struct plda_pcie_rp`, `struct plda_event_ops`, `struct plda_pcie_host_ops`, `struct plda_msi`, `struct plda_pcie_rp`, `struct plda_event`, `enum plda_int_event`, `function plda_set_default_msi`, `function plda_pcie_enable_root_port`, `function plda_pcie_set_standard_class`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.