drivers/pci/hotplug/cpqphp.h
Source file repositories/reference/linux-study-clean/drivers/pci/hotplug/cpqphp.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/hotplug/cpqphp.h- Extension
.h- Size
- 21294 bytes
- Lines
- 730
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: implementation source
- Status
- source implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/interrupt.hlinux/io.hlinux/delay.hlinux/mutex.hlinux/sched/signal.hasm/pci_x86.h
Detected Declarations
struct smbios_system_slotstruct smbios_genericstruct smbios_entry_pointstruct ctrl_regstruct hrtstruct slot_rtstruct pci_funcstruct slotstruct pci_resourcestruct event_infostruct controllerstruct irq_mappingstruct resource_listsenum smbios_system_slot_offsetsenum smbios_generic_offsetsenum smbios_entry_point_offsetsenum ctrl_offsetsenum hrt_offsetsenum slot_rt_offsetsfunction return_resourcefunction set_SOGOfunction amber_LED_onfunction amber_LED_offfunction read_amber_LEDfunction green_LED_onfunction green_LED_offfunction green_LED_blinkfunction slot_disablefunction slot_enablefunction is_slot_enabledfunction read_slot_enablefunction get_controller_speedfunction get_adapter_speedfunction enable_slot_powerfunction disable_slot_powerfunction cpq_get_attention_statusfunction get_slot_enabledfunction cpq_get_latch_statusfunction get_presence_statusfunction wait_for_ctrl_irqfunction cpqhp_routing_table_length
Annotated Snippet
struct smbios_system_slot {
u8 type;
u8 length;
u16 handle;
u8 name_string_num;
u8 slot_type;
u8 slot_width;
u8 slot_current_usage;
u8 slot_length;
u16 slot_number;
u8 properties1;
u8 properties2;
} __attribute__ ((packed));
/* offsets to the smbios generic type based on the above structure layout */
enum smbios_system_slot_offsets {
SMBIOS_SLOT_GENERIC_TYPE = offsetof(struct smbios_system_slot, type),
SMBIOS_SLOT_GENERIC_LENGTH = offsetof(struct smbios_system_slot, length),
SMBIOS_SLOT_GENERIC_HANDLE = offsetof(struct smbios_system_slot, handle),
SMBIOS_SLOT_NAME_STRING_NUM = offsetof(struct smbios_system_slot, name_string_num),
SMBIOS_SLOT_TYPE = offsetof(struct smbios_system_slot, slot_type),
SMBIOS_SLOT_WIDTH = offsetof(struct smbios_system_slot, slot_width),
SMBIOS_SLOT_CURRENT_USAGE = offsetof(struct smbios_system_slot, slot_current_usage),
SMBIOS_SLOT_LENGTH = offsetof(struct smbios_system_slot, slot_length),
SMBIOS_SLOT_NUMBER = offsetof(struct smbios_system_slot, slot_number),
SMBIOS_SLOT_PROPERTIES1 = offsetof(struct smbios_system_slot, properties1),
SMBIOS_SLOT_PROPERTIES2 = offsetof(struct smbios_system_slot, properties2),
};
struct smbios_generic {
u8 type;
u8 length;
u16 handle;
} __attribute__ ((packed));
/* offsets to the smbios generic type based on the above structure layout */
enum smbios_generic_offsets {
SMBIOS_GENERIC_TYPE = offsetof(struct smbios_generic, type),
SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
};
struct smbios_entry_point {
char anchor[4];
u8 ep_checksum;
u8 ep_length;
u8 major_version;
u8 minor_version;
u16 max_size_entry;
u8 ep_rev;
u8 reserved[5];
char int_anchor[5];
u8 int_checksum;
u16 st_length;
u32 st_address;
u16 number_of_entrys;
u8 bcd_rev;
} __attribute__ ((packed));
/* offsets to the smbios entry point based on the above structure layout */
enum smbios_entry_point_offsets {
ANCHOR = offsetof(struct smbios_entry_point, anchor[0]),
EP_CHECKSUM = offsetof(struct smbios_entry_point, ep_checksum),
EP_LENGTH = offsetof(struct smbios_entry_point, ep_length),
MAJOR_VERSION = offsetof(struct smbios_entry_point, major_version),
MINOR_VERSION = offsetof(struct smbios_entry_point, minor_version),
MAX_SIZE_ENTRY = offsetof(struct smbios_entry_point, max_size_entry),
EP_REV = offsetof(struct smbios_entry_point, ep_rev),
INT_ANCHOR = offsetof(struct smbios_entry_point, int_anchor[0]),
INT_CHECKSUM = offsetof(struct smbios_entry_point, int_checksum),
ST_LENGTH = offsetof(struct smbios_entry_point, st_length),
ST_ADDRESS = offsetof(struct smbios_entry_point, st_address),
NUMBER_OF_ENTRYS = offsetof(struct smbios_entry_point, number_of_entrys),
BCD_REV = offsetof(struct smbios_entry_point, bcd_rev),
};
struct ctrl_reg { /* offset */
u8 slot_RST; /* 0x00 */
u8 slot_enable; /* 0x01 */
u16 misc; /* 0x02 */
u32 led_control; /* 0x04 */
u32 int_input_clear; /* 0x08 */
u32 int_mask; /* 0x0a */
u8 reserved0; /* 0x10 */
u8 reserved1; /* 0x11 */
u8 reserved2; /* 0x12 */
u8 gen_output_AB; /* 0x13 */
u32 non_int_input; /* 0x14 */
u32 reserved3; /* 0x18 */
u32 reserved4; /* 0x1a */
Annotation
- Immediate include surface: `linux/interrupt.h`, `linux/io.h`, `linux/delay.h`, `linux/mutex.h`, `linux/sched/signal.h`, `asm/pci_x86.h`.
- Detected declarations: `struct smbios_system_slot`, `struct smbios_generic`, `struct smbios_entry_point`, `struct ctrl_reg`, `struct hrt`, `struct slot_rt`, `struct pci_func`, `struct slot`, `struct pci_resource`, `struct event_info`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.