drivers/pci/pci.c
Source file repositories/reference/linux-study-clean/drivers/pci/pci.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/pci.c- Extension
.c- Size
- 183956 bytes
- Lines
- 6801
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/kernel.hlinux/delay.hlinux/dmi.hlinux/init.hlinux/iommu.hlinux/lockdep.hlinux/msi.hlinux/of.hlinux/pci.hlinux/pm.hlinux/slab.hlinux/module.hlinux/spinlock.hlinux/string.hlinux/log2.hlinux/logic_pio.hlinux/device.hlinux/pm_runtime.hlinux/pci-ats.hlinux/pci_hotplug.hlinux/vmalloc.hasm/dma.hlinux/aer.hlinux/bitfield.hpci.h
Detected Declarations
struct pci_pme_devicestruct pci_acsstruct pci_saved_statefunction Resetfunction pci_reset_supportedfunction pci_ats_disabledfunction pcie_port_pm_setupfunction pci_bus_max_busnrfunction pci_status_get_and_clear_errorsfunction stringfunction pci_dev_str_matchfunction __pci_find_next_capfunction pci_find_next_capabilityfunction __pci_bus_find_cap_startfunction pci_find_capabilityfunction pci_find_capabilityfunction pci_find_next_ext_capabilityfunction pci_find_ext_capabilityfunction pci_get_dsnfunction __pci_find_next_ht_capfunction pci_find_ht_capabilityfunction pci_find_ht_capabilityfunction pci_find_vsec_capabilityfunction pci_find_dvsec_capabilityfunction pci_bus_for_each_resourcefunction resourcesfunction resourcefunction bitfunction pci_request_acsfunction __pci_config_acsfunction pci_std_enable_acsfunction pci_enable_acsfunction pci_restore_barsfunction platform_pci_power_manageablefunction platform_pci_set_power_statefunction platform_pci_get_power_statefunction platform_pci_refresh_power_statefunction platform_pci_choose_statefunction platform_pci_set_wakeupfunction platform_pci_need_resumefunction platform_pci_bridge_d3function pci_update_current_statefunction pci_update_current_statefunction pci_platform_power_transitionfunction pci_resume_onefunction pci_resume_busfunction pci_dev_waitfunction pci_power_up
Annotated Snippet
static ssize_t resource_alignment_show(const struct bus_type *bus, char *buf)
{
size_t count = 0;
spin_lock(&resource_alignment_lock);
if (resource_alignment_param)
count = sysfs_emit(buf, "%s\n", resource_alignment_param);
spin_unlock(&resource_alignment_lock);
return count;
}
static ssize_t resource_alignment_store(const struct bus_type *bus,
const char *buf, size_t count)
{
char *param, *old, *end;
if (count >= (PAGE_SIZE - 1))
return -EINVAL;
param = kstrndup(buf, count, GFP_KERNEL);
if (!param)
return -ENOMEM;
end = strchr(param, '\n');
if (end)
*end = '\0';
spin_lock(&resource_alignment_lock);
old = resource_alignment_param;
if (strlen(param)) {
resource_alignment_param = param;
} else {
kfree(param);
resource_alignment_param = NULL;
}
spin_unlock(&resource_alignment_lock);
kfree(old);
return count;
}
static BUS_ATTR_RW(resource_alignment);
static int __init pci_resource_alignment_sysfs_init(void)
{
return bus_create_file(&pci_bus_type,
&bus_attr_resource_alignment);
}
late_initcall(pci_resource_alignment_sysfs_init);
static void pci_no_domains(void)
{
#ifdef CONFIG_PCI_DOMAINS
pci_domains_supported = 0;
#endif
}
#ifdef CONFIG_PCI_DOMAINS
static DEFINE_IDA(pci_domain_nr_dynamic_ida);
/**
* pci_bus_find_emul_domain_nr() - allocate a PCI domain number per constraints
* @hint: desired domain, 0 if any ID in the range of @min to @max is acceptable
* @min: minimum allowable domain
* @max: maximum allowable domain, no IDs higher than INT_MAX will be returned
*/
int pci_bus_find_emul_domain_nr(u32 hint, u32 min, u32 max)
{
return ida_alloc_range(&pci_domain_nr_dynamic_ida, max(hint, min), max,
GFP_KERNEL);
}
EXPORT_SYMBOL_GPL(pci_bus_find_emul_domain_nr);
void pci_bus_release_emul_domain_nr(int domain_nr)
{
ida_free(&pci_domain_nr_dynamic_ida, domain_nr);
}
EXPORT_SYMBOL_GPL(pci_bus_release_emul_domain_nr);
#endif
#ifdef CONFIG_PCI_DOMAINS_GENERIC
static DEFINE_IDA(pci_domain_nr_static_ida);
static void of_pci_reserve_static_domain_nr(void)
{
struct device_node *np;
int domain_nr;
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/kernel.h`, `linux/delay.h`, `linux/dmi.h`, `linux/init.h`, `linux/iommu.h`, `linux/lockdep.h`, `linux/msi.h`.
- Detected declarations: `struct pci_pme_device`, `struct pci_acs`, `struct pci_saved_state`, `function Reset`, `function pci_reset_supported`, `function pci_ats_disabled`, `function pcie_port_pm_setup`, `function pci_bus_max_busnr`, `function pci_status_get_and_clear_errors`, `function string`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.