drivers/pci/pcie/aspm.c
Source file repositories/reference/linux-study-clean/drivers/pci/pcie/aspm.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/pcie/aspm.c- Extension
.c- Size
- 54018 bytes
- Lines
- 1787
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bits.hlinux/build_bug.hlinux/kernel.hlinux/limits.hlinux/math.hlinux/module.hlinux/moduleparam.hlinux/of.hlinux/pci.hlinux/pci_regs.hlinux/errno.hlinux/pm.hlinux/init.hlinux/printk.hlinux/slab.hlinux/time.h../pci.h
Detected Declarations
struct pcie_link_statefunction Copyrightfunction pci_restore_ltr_statefunction pci_configure_aspm_l1ssfunction pci_save_aspm_l1ss_statefunction pci_restore_aspm_l1ss_statefunction FIELD_GETfunction FIELD_GETfunction policy_to_aspm_statefunction policy_to_clkpm_statefunction pci_update_aspm_saved_statefunction pcie_set_clkpm_nocheckfunction list_for_each_entryfunction pcie_set_clkpmfunction pcie_clkpm_cap_initfunction pcie_aspm_configure_common_clockfunction list_for_each_entryfunction calc_l0s_latencyfunction calc_l0s_acceptablefunction calc_l1_latencyfunction calc_l1_acceptablefunction calc_l12_pwronfunction encode_l12_thresholdfunction pcie_aspm_check_latencyfunction aspm_calc_l12_infofunction aspm_l1ss_initfunction pcie_aspm_override_default_link_statefunction pcie_aspm_cap_initfunction FIELD_GETfunction FIELD_GETfunction pcie_config_aspm_l1ssfunction pcie_config_aspm_devfunction pcie_config_aspm_linkfunction pcie_config_aspm_pathfunction free_link_statefunction pcie_aspm_sanity_checkfunction pci_pcie_typefunction pcie_aspm_update_sysfs_visibilityfunction pcie_aspm_init_link_statefunction pci_bridge_reconfigure_ltrfunction pci_configure_ltrfunction pcie_update_aspm_capablefunction list_for_each_entryfunction pcie_aspm_exit_link_statefunction pcie_aspm_pm_state_changefunction pcie_aspm_powersave_config_linkfunction pci_calc_aspm_disable_maskfunction pci_calc_aspm_enable_mask
Annotated Snippet
struct pcie_link_state {
struct pci_dev *pdev; /* Upstream component of the Link */
struct pci_dev *downstream; /* Downstream component, function 0 */
struct pcie_link_state *root; /* pointer to the root port link */
struct pcie_link_state *parent; /* pointer to the parent Link state */
struct list_head sibling; /* node in link_list */
/* ASPM state */
u32 aspm_support:7; /* Supported ASPM state */
u32 aspm_enabled:7; /* Enabled ASPM state */
u32 aspm_capable:7; /* Capable ASPM state with latency */
u32 aspm_default:7; /* Default ASPM state by BIOS or
override */
u32 aspm_disable:7; /* Disabled ASPM state */
/* Clock PM state */
u32 clkpm_capable:1; /* Clock PM capable? */
u32 clkpm_enabled:1; /* Current Clock PM state */
u32 clkpm_default:1; /* Default Clock PM state by BIOS */
u32 clkpm_disable:1; /* Clock PM disabled */
};
static bool aspm_disabled, aspm_force;
static bool aspm_support_enabled = true;
static DEFINE_MUTEX(aspm_lock);
static LIST_HEAD(link_list);
#define POLICY_DEFAULT 0 /* BIOS default setting */
#define POLICY_PERFORMANCE 1 /* high performance */
#define POLICY_POWERSAVE 2 /* high power saving */
#define POLICY_POWER_SUPERSAVE 3 /* possibly even more power saving */
#ifdef CONFIG_PCIEASPM_PERFORMANCE
static int aspm_policy = POLICY_PERFORMANCE;
#elif defined CONFIG_PCIEASPM_POWERSAVE
static int aspm_policy = POLICY_POWERSAVE;
#elif defined CONFIG_PCIEASPM_POWER_SUPERSAVE
static int aspm_policy = POLICY_POWER_SUPERSAVE;
#else
static int aspm_policy;
#endif
static const char *policy_str[] = {
[POLICY_DEFAULT] = "default",
[POLICY_PERFORMANCE] = "performance",
[POLICY_POWERSAVE] = "powersave",
[POLICY_POWER_SUPERSAVE] = "powersupersave"
};
/*
* The L1 PM substate capability is only implemented in function 0 in a
* multi function device.
*/
static struct pci_dev *pci_function_0(struct pci_bus *linkbus)
{
struct pci_dev *child;
list_for_each_entry(child, &linkbus->devices, bus_list)
if (PCI_FUNC(child->devfn) == 0)
return child;
return NULL;
}
static int policy_to_aspm_state(struct pcie_link_state *link)
{
switch (aspm_policy) {
case POLICY_PERFORMANCE:
/* Disable ASPM and Clock PM */
return 0;
case POLICY_POWERSAVE:
/* Enable ASPM L0s/L1 */
return PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1;
case POLICY_POWER_SUPERSAVE:
/* Enable Everything */
return PCIE_LINK_STATE_ASPM_ALL;
case POLICY_DEFAULT:
return link->aspm_default;
}
return 0;
}
static int policy_to_clkpm_state(struct pcie_link_state *link)
{
switch (aspm_policy) {
case POLICY_PERFORMANCE:
/* Disable ASPM and Clock PM */
return 0;
case POLICY_POWERSAVE:
case POLICY_POWER_SUPERSAVE:
/* Enable Clock PM */
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bits.h`, `linux/build_bug.h`, `linux/kernel.h`, `linux/limits.h`, `linux/math.h`, `linux/module.h`, `linux/moduleparam.h`.
- Detected declarations: `struct pcie_link_state`, `function Copyright`, `function pci_restore_ltr_state`, `function pci_configure_aspm_l1ss`, `function pci_save_aspm_l1ss_state`, `function pci_restore_aspm_l1ss_state`, `function FIELD_GET`, `function FIELD_GET`, `function policy_to_aspm_state`, `function policy_to_clkpm_state`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.