drivers/pci/tph.c
Source file repositories/reference/linux-study-clean/drivers/pci/tph.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pci/tph.c- Extension
.c- Size
- 13106 bytes
- Lines
- 526
- Domain
- Representative Device Path
- Bucket
- PCIe NVMe Storage Path
- Inferred role
- Representative Device Path: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Part of the selected hardware vertical slice: PCI discovery, driver binding, NVMe queues, block requests, DMA, interrupts, and completion.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/pci-acpi.hlinux/msi.hlinux/bitfield.hlinux/pci-tph.hpci.h
Detected Declarations
function tph_extract_tagfunction tph_invoke_dsmfunction set_ctrl_reg_req_enfunction get_st_modesfunction pcie_tph_get_st_table_locfunction pcie_tph_get_st_table_sizefunction get_rp_completer_typefunction write_tag_to_st_tablefunction pcie_tph_get_cpu_stfunction pcie_tph_set_st_entryfunction pcie_disable_tphfunction pcie_enable_tphfunction pci_restore_tph_statefunction pci_save_tph_statefunction pci_no_tphfunction pci_tph_initexport pcie_tph_get_st_table_locexport pcie_tph_get_st_table_sizeexport pcie_tph_get_cpu_stexport pcie_tph_set_st_entryexport pcie_disable_tphexport pcie_enable_tph
Annotated Snippet
switch (mem_type) {
case TPH_MEM_TYPE_VM:
if (info->vm_st_valid)
return info->vm_st;
break;
case TPH_MEM_TYPE_PM:
if (info->pm_st_valid)
return info->pm_st;
break;
}
break;
case PCI_TPH_REQ_EXT_TPH: /* 16-bit tag */
switch (mem_type) {
case TPH_MEM_TYPE_VM:
if (info->vm_xst_valid)
return info->vm_xst;
break;
case TPH_MEM_TYPE_PM:
if (info->pm_xst_valid)
return info->pm_xst;
break;
}
break;
default:
return 0;
}
return 0;
}
#define TPH_ST_DSM_FUNC_INDEX 0xF
static acpi_status tph_invoke_dsm(acpi_handle handle, u32 cpu_uid,
union st_info *st_out)
{
union acpi_object arg3[3], in_obj, *out_obj;
if (!acpi_check_dsm(handle, &pci_acpi_dsm_guid, 7,
BIT(TPH_ST_DSM_FUNC_INDEX)))
return AE_ERROR;
/* DWORD: feature ID (0 for processor cache ST query) */
arg3[0].integer.type = ACPI_TYPE_INTEGER;
arg3[0].integer.value = 0;
/* DWORD: target UID */
arg3[1].integer.type = ACPI_TYPE_INTEGER;
arg3[1].integer.value = cpu_uid;
/* QWORD: properties, all 0's */
arg3[2].integer.type = ACPI_TYPE_INTEGER;
arg3[2].integer.value = 0;
in_obj.type = ACPI_TYPE_PACKAGE;
in_obj.package.count = ARRAY_SIZE(arg3);
in_obj.package.elements = arg3;
out_obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 7,
TPH_ST_DSM_FUNC_INDEX, &in_obj);
if (!out_obj)
return AE_ERROR;
if (out_obj->type != ACPI_TYPE_BUFFER) {
ACPI_FREE(out_obj);
return AE_ERROR;
}
st_out->value = *((u64 *)(out_obj->buffer.pointer));
ACPI_FREE(out_obj);
return AE_OK;
}
#endif
/* Update the TPH Requester Enable field of TPH Control Register */
static void set_ctrl_reg_req_en(struct pci_dev *pdev, u8 req_type)
{
u32 reg;
pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, ®);
reg &= ~PCI_TPH_CTRL_REQ_EN_MASK;
reg |= FIELD_PREP(PCI_TPH_CTRL_REQ_EN_MASK, req_type);
pci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, reg);
}
static u8 get_st_modes(struct pci_dev *pdev)
{
u32 reg;
Annotation
- Immediate include surface: `linux/pci.h`, `linux/pci-acpi.h`, `linux/msi.h`, `linux/bitfield.h`, `linux/pci-tph.h`, `pci.h`.
- Detected declarations: `function tph_extract_tag`, `function tph_invoke_dsm`, `function set_ctrl_reg_req_en`, `function get_st_modes`, `function pcie_tph_get_st_table_loc`, `function pcie_tph_get_st_table_size`, `function get_rp_completer_type`, `function write_tag_to_st_table`, `function pcie_tph_get_cpu_st`, `function pcie_tph_set_st_entry`.
- Atlas domain: Representative Device Path / PCIe NVMe Storage Path.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.