drivers/pcmcia/sa11xx_base.c
Source file repositories/reference/linux-study-clean/drivers/pcmcia/sa11xx_base.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pcmcia/sa11xx_base.c- Extension
.c- Size
- 7492 bytes
- Lines
- 264
- Domain
- Driver Families
- Bucket
- drivers/pcmcia
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/init.hlinux/cpufreq.hlinux/ioport.hlinux/kernel.hlinux/spinlock.hlinux/io.hlinux/slab.hmach/hardware.hasm/irq.hsoc_common.hsa11xx_base.h
Detected Declarations
function sa1100_pcmcia_default_mecr_timingfunction sa1100_pcmcia_set_mecrfunction sa1100_pcmcia_frequency_changefunction sa1100_pcmcia_set_timingfunction sa1100_pcmcia_show_timingfunction sa11xx_drv_pcmcia_add_onefunction sa11xx_drv_pcmcia_opsfunction sa11xx_drv_pcmcia_probeexport sa11xx_drv_pcmcia_add_oneexport sa11xx_drv_pcmcia_opsexport sa11xx_drv_pcmcia_probe
Annotated Snippet
Device driver for the PCMCIA control functionality of StrongARM
SA-1100 microprocessors.
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
The initial developer of the original code is John G. Dorsey
<john+@cs.cmu.edu>. Portions created by John G. Dorsey are
Copyright (C) 1999 John G. Dorsey. All Rights Reserved.
Alternatively, the contents of this file may be used under the
terms of the GNU Public License version 2 (the "GPL"), in which
case the provisions of the GPL are applicable instead of the
above. If you wish to allow the use of your version of this file
only under the terms of the GPL and not to allow others to use
your version of this file under the MPL, indicate your decision
by deleting the provisions above and replace them with the notice
and other provisions required by the GPL. If you do not delete
the provisions above, a recipient may use your version of this
file under either the MPL or the GPL.
======================================================================*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include "soc_common.h"
#include "sa11xx_base.h"
/*
* sa1100_pcmcia_default_mecr_timing
* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
*
* Calculate MECR clock wait states for given CPU clock
* speed and command wait state. This function can be over-
* written by a board specific version.
*
* The default is to simply calculate the BS values as specified in
* the INTEL SA1100 development manual
* "Expansion Memory (PCMCIA) Configuration Register (MECR)"
* that's section 10.2.5 in _my_ version of the manual ;)
*/
static unsigned int
sa1100_pcmcia_default_mecr_timing(struct soc_pcmcia_socket *skt,
unsigned int cpu_speed,
unsigned int cmd_time)
{
return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed);
}
/* sa1100_pcmcia_set_mecr()
* ^^^^^^^^^^^^^^^^^^^^^^^^
*
* set MECR value for socket <sock> based on this sockets
* io, mem and attribute space access speed.
* Call board specific BS value calculation to allow boards
* to tweak the BS values.
*/
static int
sa1100_pcmcia_set_mecr(struct soc_pcmcia_socket *skt, unsigned int cpu_clock)
{
struct soc_pcmcia_timing timing;
u32 mecr, old_mecr;
unsigned long flags;
unsigned int bs_io, bs_mem, bs_attr;
soc_common_pcmcia_get_timing(skt, &timing);
bs_io = skt->ops->get_timing(skt, cpu_clock, timing.io);
bs_mem = skt->ops->get_timing(skt, cpu_clock, timing.mem);
bs_attr = skt->ops->get_timing(skt, cpu_clock, timing.attr);
local_irq_save(flags);
Annotation
- Immediate include surface: `linux/module.h`, `linux/init.h`, `linux/cpufreq.h`, `linux/ioport.h`, `linux/kernel.h`, `linux/spinlock.h`, `linux/io.h`, `linux/slab.h`.
- Detected declarations: `function sa1100_pcmcia_default_mecr_timing`, `function sa1100_pcmcia_set_mecr`, `function sa1100_pcmcia_frequency_change`, `function sa1100_pcmcia_set_timing`, `function sa1100_pcmcia_show_timing`, `function sa11xx_drv_pcmcia_add_one`, `function sa11xx_drv_pcmcia_ops`, `function sa11xx_drv_pcmcia_probe`, `export sa11xx_drv_pcmcia_add_one`, `export sa11xx_drv_pcmcia_ops`.
- Atlas domain: Driver Families / drivers/pcmcia.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.