drivers/pcmcia/sa11xx_base.h
Source file repositories/reference/linux-study-clean/drivers/pcmcia/sa11xx_base.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/pcmcia/sa11xx_base.h- Extension
.h- Size
- 4857 bytes
- Lines
- 126
- Domain
- Driver Families
- Bucket
- drivers/pcmcia
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
function sa1100_pcmcia_mecr_bsfunction sa1100_pcmcia_cmd_time
Annotated Snippet
Device driver for the PCMCIA control functionality of StrongARM
SA-1100 microprocessors.
The contents of this file are subject to the Mozilla Public
License Version 1.1 (the "License"); you may not use this file
except in compliance with the License. You may obtain a copy of
the License at http://www.mozilla.org/MPL/
Software distributed under the License is distributed on an "AS
IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
implied. See the License for the specific language governing
rights and limitations under the License.
The initial developer of the original code is John G. Dorsey
<john+@cs.cmu.edu>. Portions created by John G. Dorsey are
Copyright (C) 1999 John G. Dorsey. All Rights Reserved.
Alternatively, the contents of this file may be used under the
terms of the GNU Public License version 2 (the "GPL"), in which
case the provisions of the GPL are applicable instead of the
above. If you wish to allow the use of your version of this file
only under the terms of the GPL and not to allow others to use
your version of this file under the MPL, indicate your decision
by deleting the provisions above and replace them with the notice
and other provisions required by the GPL. If you do not delete
the provisions above, a recipient may use your version of this
file under either the MPL or the GPL.
======================================================================*/
#if !defined(_PCMCIA_SA1100_H)
# define _PCMCIA_SA1100_H
/* SA-1100 PCMCIA Memory and I/O timing
* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
* The SA-1110 Developer's Manual, section 10.2.5, says the following:
*
* "To calculate the recommended BS_xx value for each address space:
* divide the command width time (the greater of twIOWR and twIORD,
* or the greater of twWE and twOE) by processor cycle time; divide
* by 2; divide again by 3 (number of BCLK's per command assertion);
* round up to the next whole number; and subtract 1."
*/
/* MECR: Expansion Memory Configuration Register
* (SA-1100 Developers Manual, p.10-13; SA-1110 Developers Manual, p.10-24)
*
* MECR layout is:
*
* FAST1 BSM1<4:0> BSA1<4:0> BSIO1<4:0> FAST0 BSM0<4:0> BSA0<4:0> BSIO0<4:0>
*
* (This layout is actually true only for the SA-1110; the FASTn bits are
* reserved on the SA-1100.)
*/
#define MECR_SOCKET_0_SHIFT (0)
#define MECR_SOCKET_1_SHIFT (16)
#define MECR_BS_MASK (0x1f)
#define MECR_FAST_MODE_MASK (0x01)
#define MECR_BSIO_SHIFT (0)
#define MECR_BSA_SHIFT (5)
#define MECR_BSM_SHIFT (10)
#define MECR_FAST_SHIFT (15)
#define MECR_SET(mecr, sock, shift, mask, bs) \
((mecr)=((mecr)&~(((mask)<<(shift))<<\
((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))|\
(((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))
#define MECR_GET(mecr, sock, shift, mask) \
((((mecr)>>(((sock)==0)?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT))>>\
(shift))&(mask))
#define MECR_BSIO_SET(mecr, sock, bs) \
MECR_SET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK, (bs))
#define MECR_BSIO_GET(mecr, sock) \
MECR_GET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK)
#define MECR_BSA_SET(mecr, sock, bs) \
MECR_SET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK, (bs))
#define MECR_BSA_GET(mecr, sock) \
MECR_GET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK)
#define MECR_BSM_SET(mecr, sock, bs) \
MECR_SET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK, (bs))
Annotation
- Detected declarations: `function sa1100_pcmcia_mecr_bs`, `function sa1100_pcmcia_cmd_time`.
- Atlas domain: Driver Families / drivers/pcmcia.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.