drivers/pcmcia/soc_common.c
Source file repositories/reference/linux-study-clean/drivers/pcmcia/soc_common.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pcmcia/soc_common.c- Extension
.c- Size
- 23807 bytes
- Lines
- 892
- Domain
- Driver Families
- Bucket
- drivers/pcmcia
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/cpufreq.hlinux/gpio.hlinux/gpio/consumer.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/kernel.hlinux/mm.hlinux/module.hlinux/moduleparam.hlinux/mutex.hlinux/regulator/consumer.hlinux/spinlock.hlinux/timer.hlinux/pci.hsoc_common.h
Detected Declarations
struct bittblfunction soc_pcmcia_debugfunction soc_pcmcia_regulator_setfunction calc_speedfunction soc_common_pcmcia_get_timingfunction __soc_pcmcia_hw_shutdownfunction soc_pcmcia_hw_shutdownfunction soc_pcmcia_request_gpiodsfunction soc_pcmcia_hw_initfunction soc_pcmcia_hw_enablefunction soc_pcmcia_hw_disablefunction soc_common_cf_socket_statefunction soc_common_pcmcia_skt_statefunction soc_common_pcmcia_config_sktfunction soc_common_pcmcia_sock_initfunction soc_common_pcmcia_suspendfunction soc_common_check_statusfunction soc_common_pcmcia_poll_eventfunction interruptsfunction get_statusfunction set_socketfunction set_io_mapfunction set_mem_mapfunction dump_bitsfunction show_statusfunction soc_common_pcmcia_cpufreq_nbfunction soc_pcmcia_init_onefunction soc_pcmcia_remove_onefunction soc_pcmcia_add_oneexport soc_pcmcia_debugexport soc_pcmcia_regulator_setexport soc_common_pcmcia_get_timingexport soc_pcmcia_request_gpiodsexport soc_common_cf_socket_stateexport soc_pcmcia_init_oneexport soc_pcmcia_remove_oneexport soc_pcmcia_add_one
Annotated Snippet
struct bittbl {
unsigned int mask;
const char *name;
};
static struct bittbl status_bits[] = {
{ SS_WRPROT, "SS_WRPROT" },
{ SS_BATDEAD, "SS_BATDEAD" },
{ SS_BATWARN, "SS_BATWARN" },
{ SS_READY, "SS_READY" },
{ SS_DETECT, "SS_DETECT" },
{ SS_POWERON, "SS_POWERON" },
{ SS_STSCHG, "SS_STSCHG" },
{ SS_3VCARD, "SS_3VCARD" },
{ SS_XVCARD, "SS_XVCARD" },
};
static struct bittbl conf_bits[] = {
{ SS_PWR_AUTO, "SS_PWR_AUTO" },
{ SS_IOCARD, "SS_IOCARD" },
{ SS_RESET, "SS_RESET" },
{ SS_DMA_MODE, "SS_DMA_MODE" },
{ SS_SPKR_ENA, "SS_SPKR_ENA" },
{ SS_OUTPUT_ENA, "SS_OUTPUT_ENA" },
};
static void dump_bits(char **p, const char *prefix,
unsigned int val, struct bittbl *bits, int sz)
{
char *b = *p;
int i;
b += sprintf(b, "%-9s:", prefix);
for (i = 0; i < sz; i++)
if (val & bits[i].mask)
b += sprintf(b, " %s", bits[i].name);
*b++ = '\n';
*p = b;
}
/*
* Implements the /sys/class/pcmcia_socket/??/status file.
*
* Returns: the number of characters added to the buffer
*/
static ssize_t show_status(
struct device *dev, struct device_attribute *attr, char *buf)
{
struct soc_pcmcia_socket *skt =
container_of(dev, struct soc_pcmcia_socket, socket.dev);
char *p = buf;
p += sprintf(p, "slot : %d\n", skt->nr);
dump_bits(&p, "status", skt->status,
status_bits, ARRAY_SIZE(status_bits));
dump_bits(&p, "csc_mask", skt->cs_state.csc_mask,
status_bits, ARRAY_SIZE(status_bits));
dump_bits(&p, "cs_flags", skt->cs_state.flags,
conf_bits, ARRAY_SIZE(conf_bits));
p += sprintf(p, "Vcc : %d\n", skt->cs_state.Vcc);
p += sprintf(p, "Vpp : %d\n", skt->cs_state.Vpp);
p += sprintf(p, "IRQ : %d (%d)\n", skt->cs_state.io_irq,
skt->socket.pci_irq);
if (skt->ops->show_timing)
p += skt->ops->show_timing(skt, p);
return p-buf;
}
static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
static struct pccard_operations soc_common_pcmcia_operations = {
.init = soc_common_pcmcia_sock_init,
.suspend = soc_common_pcmcia_suspend,
.get_status = soc_common_pcmcia_get_status,
.set_socket = soc_common_pcmcia_set_socket,
.set_io_map = soc_common_pcmcia_set_io_map,
.set_mem_map = soc_common_pcmcia_set_mem_map,
};
#ifdef CONFIG_CPU_FREQ
static int soc_common_pcmcia_cpufreq_nb(struct notifier_block *nb,
unsigned long val, void *data)
{
struct soc_pcmcia_socket *skt = container_of(nb, struct soc_pcmcia_socket, cpufreq_nb);
struct cpufreq_freqs *freqs = data;
Annotation
- Immediate include surface: `linux/cpufreq.h`, `linux/gpio.h`, `linux/gpio/consumer.h`, `linux/init.h`, `linux/interrupt.h`, `linux/io.h`, `linux/irq.h`, `linux/kernel.h`.
- Detected declarations: `struct bittbl`, `function soc_pcmcia_debug`, `function soc_pcmcia_regulator_set`, `function calc_speed`, `function soc_common_pcmcia_get_timing`, `function __soc_pcmcia_hw_shutdown`, `function soc_pcmcia_hw_shutdown`, `function soc_pcmcia_request_gpiods`, `function soc_pcmcia_hw_init`, `function soc_pcmcia_hw_enable`.
- Atlas domain: Driver Families / drivers/pcmcia.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.