drivers/perf/amlogic/meson_g12_ddr_pmu.c

Source file repositories/reference/linux-study-clean/drivers/perf/amlogic/meson_g12_ddr_pmu.c

File Facts

System
Linux kernel
Corpus path
drivers/perf/amlogic/meson_g12_ddr_pmu.c
Extension
.c
Size
10452 bytes
Lines
394
Domain
Driver Families
Bucket
drivers/perf
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2022 Amlogic, Inc. All rights reserved.
 */

#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/perf_event.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/types.h>

#include <soc/amlogic/meson_ddr_pmu.h>

#define PORT_MAJOR		32
#define DEFAULT_XTAL_FREQ	24000000UL

#define DMC_QOS_IRQ		BIT(30)

/* DMC bandwidth monitor register address offset */
#define DMC_MON_G12_CTRL0		(0x0  << 2)
#define DMC_MON_G12_CTRL1		(0x1  << 2)
#define DMC_MON_G12_CTRL2		(0x2  << 2)
#define DMC_MON_G12_CTRL3		(0x3  << 2)
#define DMC_MON_G12_CTRL4		(0x4  << 2)
#define DMC_MON_G12_CTRL5		(0x5  << 2)
#define DMC_MON_G12_CTRL6		(0x6  << 2)
#define DMC_MON_G12_CTRL7		(0x7  << 2)
#define DMC_MON_G12_CTRL8		(0x8  << 2)

#define DMC_MON_G12_ALL_REQ_CNT		(0x9  << 2)
#define DMC_MON_G12_ALL_GRANT_CNT	(0xa  << 2)
#define DMC_MON_G12_ONE_GRANT_CNT	(0xb  << 2)
#define DMC_MON_G12_SEC_GRANT_CNT	(0xc  << 2)
#define DMC_MON_G12_THD_GRANT_CNT	(0xd  << 2)
#define DMC_MON_G12_FOR_GRANT_CNT	(0xe  << 2)
#define DMC_MON_G12_TIMER		(0xf  << 2)

/* Each bit represent a axi line */
PMU_FORMAT_ATTR(event, "config:0-7");
PMU_FORMAT_ATTR(arm, "config1:0");
PMU_FORMAT_ATTR(gpu, "config1:1");
PMU_FORMAT_ATTR(pcie, "config1:2");
PMU_FORMAT_ATTR(hdcp, "config1:3");
PMU_FORMAT_ATTR(hevc_front, "config1:4");
PMU_FORMAT_ATTR(usb3_0, "config1:6");
PMU_FORMAT_ATTR(device, "config1:7");
PMU_FORMAT_ATTR(hevc_back, "config1:8");
PMU_FORMAT_ATTR(h265enc, "config1:9");
PMU_FORMAT_ATTR(vpu_read1, "config1:16");
PMU_FORMAT_ATTR(vpu_read2, "config1:17");
PMU_FORMAT_ATTR(vpu_read3, "config1:18");
PMU_FORMAT_ATTR(vpu_write1, "config1:19");
PMU_FORMAT_ATTR(vpu_write2, "config1:20");
PMU_FORMAT_ATTR(vdec, "config1:21");
PMU_FORMAT_ATTR(hcodec, "config1:22");
PMU_FORMAT_ATTR(ge2d, "config1:23");

PMU_FORMAT_ATTR(spicc1, "config1:32");
PMU_FORMAT_ATTR(usb0, "config1:33");
PMU_FORMAT_ATTR(dma, "config1:34");
PMU_FORMAT_ATTR(arb0, "config1:35");
PMU_FORMAT_ATTR(sd_emmc_b, "config1:36");
PMU_FORMAT_ATTR(usb1, "config1:37");
PMU_FORMAT_ATTR(audio, "config1:38");
PMU_FORMAT_ATTR(aififo, "config1:39");
PMU_FORMAT_ATTR(parser, "config1:41");
PMU_FORMAT_ATTR(ao_cpu, "config1:42");
PMU_FORMAT_ATTR(sd_emmc_c, "config1:43");
PMU_FORMAT_ATTR(spicc2, "config1:44");
PMU_FORMAT_ATTR(ethernet, "config1:45");
PMU_FORMAT_ATTR(sana, "config1:46");

/* for sm1 and g12b */
PMU_FORMAT_ATTR(nna, "config1:10");

/* for g12b only */
PMU_FORMAT_ATTR(gdc, "config1:11");
PMU_FORMAT_ATTR(mipi_isp, "config1:12");
PMU_FORMAT_ATTR(arm1, "config1:13");
PMU_FORMAT_ATTR(sd_emmc_a, "config1:40");

static struct attribute *g12_pmu_format_attrs[] = {
	&format_attr_event.attr,
	&format_attr_arm.attr,
	&format_attr_gpu.attr,
	&format_attr_nna.attr,

Annotation

Implementation Notes