drivers/perf/hisilicon/hisi_pcie_pmu.c
Source file repositories/reference/linux-study-clean/drivers/perf/hisilicon/hisi_pcie_pmu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/perf/hisilicon/hisi_pcie_pmu.c- Extension
.c- Size
- 28054 bytes
- Lines
- 1008
- Domain
- Driver Families
- Bucket
- drivers/perf
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bitmap.hlinux/bug.hlinux/device.hlinux/err.hlinux/interrupt.hlinux/irq.hlinux/kernel.hlinux/list.hlinux/module.hlinux/pci.hlinux/perf_event.h
Detected Declarations
struct hisi_pcie_pmustruct hisi_pcie_reg_pairfunction hisi_pcie_event_sysfs_showfunction cpumask_showfunction identifier_showfunction bus_showfunction bdf_min_showfunction bdf_max_showfunction hisi_pcie_parse_reg_valuefunction eventsfunction hisi_pcie_pmu_get_offsetfunction hisi_pcie_pmu_readlfunction hisi_pcie_pmu_writelfunction hisi_pcie_pmu_readqfunction hisi_pcie_pmu_writeqfunction hisi_pcie_pmu_get_event_ctrl_valfunction hisi_pcie_pmu_config_event_ctrlfunction hisi_pcie_pmu_clear_event_ctrlfunction hisi_pcie_pmu_valid_requester_idfunction hisi_pcie_pmu_valid_filterfunction hisi_pcie_pmu_cmp_eventfunction hisi_pcie_pmu_validate_event_groupfunction for_each_sibling_eventfunction hisi_pcie_pmu_event_initfunction hisi_pcie_pmu_read_counterfunction hisi_pcie_pmu_get_event_idxfunction hisi_pcie_pmu_event_updatefunction hisi_pcie_pmu_readfunction hisi_pcie_pmu_set_periodfunction hisi_pcie_pmu_enable_counterfunction hisi_pcie_pmu_disable_counterfunction hisi_pcie_pmu_enable_intfunction hisi_pcie_pmu_disable_intfunction hisi_pcie_pmu_reset_counterfunction hisi_pcie_pmu_startfunction hisi_pcie_pmu_stopfunction hisi_pcie_pmu_addfunction hisi_pcie_pmu_delfunction hisi_pcie_pmu_enablefunction hisi_pcie_pmu_disablefunction hisi_pcie_pmu_irqfunction hisi_pcie_pmu_irq_registerfunction hisi_pcie_pmu_irq_unregisterfunction hisi_pcie_pmu_online_cpufunction hisi_pcie_pmu_offline_cpufunction hisi_pcie_alloc_pmufunction hisi_pcie_init_pmufunction hisi_pcie_uninit_pmu
Annotated Snippet
static struct pci_driver hisi_pcie_pmu_driver = {
.name = DRV_NAME,
.id_table = hisi_pcie_pmu_ids,
.probe = hisi_pcie_pmu_probe,
.remove = hisi_pcie_pmu_remove,
};
static int __init hisi_pcie_module_init(void)
{
int ret;
ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_ARM_HISI_PCIE_PMU_ONLINE,
"AP_PERF_ARM_HISI_PCIE_PMU_ONLINE",
hisi_pcie_pmu_online_cpu,
hisi_pcie_pmu_offline_cpu);
if (ret) {
pr_err("Failed to setup PCIe PMU hotplug: %d\n", ret);
return ret;
}
ret = pci_register_driver(&hisi_pcie_pmu_driver);
if (ret)
cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_HISI_PCIE_PMU_ONLINE);
return ret;
}
module_init(hisi_pcie_module_init);
static void __exit hisi_pcie_module_exit(void)
{
pci_unregister_driver(&hisi_pcie_pmu_driver);
cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_HISI_PCIE_PMU_ONLINE);
}
module_exit(hisi_pcie_module_exit);
MODULE_DESCRIPTION("HiSilicon PCIe PMU driver");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Qi Liu <liuqi115@huawei.com>");
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bitmap.h`, `linux/bug.h`, `linux/device.h`, `linux/err.h`, `linux/interrupt.h`, `linux/irq.h`, `linux/kernel.h`.
- Detected declarations: `struct hisi_pcie_pmu`, `struct hisi_pcie_reg_pair`, `function hisi_pcie_event_sysfs_show`, `function cpumask_show`, `function identifier_show`, `function bus_show`, `function bdf_min_show`, `function bdf_max_show`, `function hisi_pcie_parse_reg_value`, `function events`.
- Atlas domain: Driver Families / drivers/perf.
- Implementation status: pattern implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.