drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

File Facts

System

Linux kernel

Corpus path

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

Extension

.c

Size

28080 bytes

Lines

973

Domain

Driver Families

Bucket

drivers/perf

Inferred role

Driver Families: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/acpi.h
• linux/bug.h
• linux/cpuhotplug.h
• linux/interrupt.h
• linux/irq.h
• linux/list.h
• linux/smp.h
• hisi_uncore_pmu.h

Detected Declarations

• struct hisi_l3c_pmu
• struct hisi_l3c_pmu_ext
• function support_ext
• function hisi_l3c_pmu_get_tt_core
• function hisi_l3c_pmu_get_event_idx
• function hisi_l3c_pmu_event_readl
• function hisi_l3c_pmu_event_writel
• function hisi_l3c_pmu_event_readq
• function hisi_l3c_pmu_event_writeq
• function hisi_l3c_pmu_config_req_tracetag
• function hisi_l3c_pmu_clear_req_tracetag
• function hisi_l3c_pmu_write_ds
• function hisi_l3c_pmu_config_ds
• function hisi_l3c_pmu_clear_ds
• function hisi_l3c_pmu_config_core_tracetag
• function hisi_l3c_pmu_clear_core_tracetag
• function hisi_l3c_pmu_have_filter
• function hisi_l3c_pmu_enable_filter
• function hisi_l3c_pmu_disable_filter
• function hisi_l3c_pmu_check_filter
• function hisi_l3c_pmu_get_counter_offset
• function hisi_l3c_pmu_read_counter
• function hisi_l3c_pmu_write_counter
• function hisi_l3c_pmu_write_evtype
• function hisi_l3c_pmu_start_counters
• function range
• function hisi_l3c_pmu_stop_counters
• function range
• function hisi_l3c_pmu_enable_counter
• function hisi_l3c_pmu_disable_counter
• function hisi_l3c_pmu_enable_counter_int
• function hisi_l3c_pmu_disable_counter_int
• function hisi_l3c_pmu_get_int_status
• function hisi_l3c_pmu_clear_int_status
• function hisi_l3c_pmu_init_data
• function hisi_l3c_pmu_init_ext
• function hisi_l3c_pmu_dev_probe
• function hisi_l3c_pmu_probe
• function hisi_l3c_pmu_remove
• function hisi_l3c_pmu_online_cpu
• function hisi_l3c_pmu_offline_cpu
• function hisi_l3c_pmu_module_init
• function hisi_l3c_pmu_module_exit
• module init hisi_l3c_pmu_module_init

Annotated Snippet

module_init(hisi_l3c_pmu_module_init);

static void __exit hisi_l3c_pmu_module_exit(void)
{
	platform_driver_unregister(&hisi_l3c_pmu_driver);
	cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_HISI_L3_ONLINE);
}
module_exit(hisi_l3c_pmu_module_exit);

MODULE_IMPORT_NS("HISI_PMU");
MODULE_DESCRIPTION("HiSilicon SoC L3C uncore PMU driver");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Anurup M <anurup.m@huawei.com>");
MODULE_AUTHOR("Shaokun Zhang <zhangshaokun@hisilicon.com>");

Annotation

• Immediate include surface: `linux/acpi.h`, `linux/bug.h`, `linux/cpuhotplug.h`, `linux/interrupt.h`, `linux/irq.h`, `linux/list.h`, `linux/smp.h`, `hisi_uncore_pmu.h`.
• Detected declarations: `struct hisi_l3c_pmu`, `struct hisi_l3c_pmu_ext`, `function support_ext`, `function hisi_l3c_pmu_get_tt_core`, `function hisi_l3c_pmu_get_event_idx`, `function hisi_l3c_pmu_event_readl`, `function hisi_l3c_pmu_event_writel`, `function hisi_l3c_pmu_event_readq`, `function hisi_l3c_pmu_event_writeq`, `function hisi_l3c_pmu_config_req_tracetag`.
• Atlas domain: Driver Families / drivers/perf.
• Implementation status: integration implementation candidate.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.