drivers/perf/xgene_pmu.c
Source file repositories/reference/linux-study-clean/drivers/perf/xgene_pmu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/perf/xgene_pmu.c- Extension
.c- Size
- 56955 bytes
- Lines
- 1956
- Domain
- Driver Families
- Bucket
- drivers/perf
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/acpi.hlinux/clk.hlinux/cpuhotplug.hlinux/cpumask.hlinux/interrupt.hlinux/io.hlinux/mfd/syscon.hlinux/module.hlinux/of_address.hlinux/perf_event.hlinux/platform_device.hlinux/property.hlinux/regmap.hlinux/slab.h
Detected Declarations
struct hw_pmu_infostruct xgene_pmu_devstruct xgene_pmu_opsstruct xgene_pmustruct xgene_pmu_dev_ctxstruct xgene_pmu_dataenum xgene_pmu_versionenum xgene_pmu_dev_typefunction xgene_pmu_event_showfunction cpumask_showfunction get_next_avail_cntrfunction clear_avail_cntrfunction xgene_pmu_mask_intfunction xgene_pmu_v3_mask_intfunction xgene_pmu_unmask_intfunction xgene_pmu_v3_unmask_intfunction xgene_pmu_read_counter32function xgene_pmu_read_counter64function xgene_pmu_write_counter32function xgene_pmu_write_counter64function xgene_pmu_write_evttypefunction xgene_pmu_write_agentmskfunction xgene_pmu_v3_write_agentmskfunction xgene_pmu_v3_write_agent1mskfunction xgene_pmu_disable_counterfunction xgene_pmu_enable_counter_intfunction xgene_pmu_disable_counter_intfunction xgene_pmu_reset_countersfunction xgene_pmu_start_countersfunction xgene_pmu_stop_countersfunction xgene_perf_pmu_enablefunction xgene_perf_pmu_disablefunction xgene_perf_event_initfunction for_each_sibling_eventfunction xgene_perf_enable_eventfunction xgene_perf_disable_eventfunction xgene_perf_event_set_periodfunction xgene_perf_event_updatefunction xgene_perf_readfunction xgene_perf_startfunction xgene_perf_stopfunction xgene_perf_addfunction xgene_perf_delfunction xgene_init_perffunction xgene_pmu_dev_addfunction _xgene_pmu_isrfunction xgene_pmu_isrfunction list_for_each_entry
Annotated Snippet
struct hw_pmu_info {
u32 type;
u32 enable_mask;
void __iomem *csr;
};
struct xgene_pmu_dev {
struct hw_pmu_info *inf;
struct xgene_pmu *parent;
struct pmu pmu;
u8 max_counters;
DECLARE_BITMAP(cntr_assign_mask, PMU_MAX_COUNTERS);
u64 max_period;
const struct attribute_group **attr_groups;
struct perf_event *pmu_counter_event[PMU_MAX_COUNTERS];
};
struct xgene_pmu_ops {
void (*mask_int)(struct xgene_pmu *pmu);
void (*unmask_int)(struct xgene_pmu *pmu);
u64 (*read_counter)(struct xgene_pmu_dev *pmu, int idx);
void (*write_counter)(struct xgene_pmu_dev *pmu, int idx, u64 val);
void (*write_evttype)(struct xgene_pmu_dev *pmu_dev, int idx, u32 val);
void (*write_agentmsk)(struct xgene_pmu_dev *pmu_dev, u32 val);
void (*write_agent1msk)(struct xgene_pmu_dev *pmu_dev, u32 val);
void (*enable_counter)(struct xgene_pmu_dev *pmu_dev, int idx);
void (*disable_counter)(struct xgene_pmu_dev *pmu_dev, int idx);
void (*enable_counter_int)(struct xgene_pmu_dev *pmu_dev, int idx);
void (*disable_counter_int)(struct xgene_pmu_dev *pmu_dev, int idx);
void (*reset_counters)(struct xgene_pmu_dev *pmu_dev);
void (*start_counters)(struct xgene_pmu_dev *pmu_dev);
void (*stop_counters)(struct xgene_pmu_dev *pmu_dev);
};
struct xgene_pmu {
struct device *dev;
struct hlist_node node;
int version;
void __iomem *pcppmu_csr;
u32 mcb_active_mask;
u32 mc_active_mask;
u32 l3c_active_mask;
cpumask_t cpu;
int irq;
raw_spinlock_t lock;
const struct xgene_pmu_ops *ops;
struct list_head l3cpmus;
struct list_head iobpmus;
struct list_head mcbpmus;
struct list_head mcpmus;
};
struct xgene_pmu_dev_ctx {
char *name;
struct list_head next;
struct xgene_pmu_dev *pmu_dev;
struct hw_pmu_info inf;
};
struct xgene_pmu_data {
int id;
u32 data;
};
enum xgene_pmu_version {
PCP_PMU_V1 = 1,
PCP_PMU_V2,
PCP_PMU_V3,
};
enum xgene_pmu_dev_type {
PMU_TYPE_L3C = 0,
PMU_TYPE_IOB,
PMU_TYPE_IOB_SLOW,
PMU_TYPE_MCB,
PMU_TYPE_MC,
};
/*
* sysfs format attributes
*/
#define XGENE_PMU_FORMAT_ATTR(_name, _config) \
(&((struct dev_ext_attribute[]) { \
{ .attr = __ATTR(_name, S_IRUGO, device_show_string, NULL), \
.var = (void *) _config, } \
})[0].attr.attr)
static struct attribute *l3c_pmu_format_attrs[] = {
XGENE_PMU_FORMAT_ATTR(l3c_eventid, "config:0-7"),
XGENE_PMU_FORMAT_ATTR(l3c_agentid, "config1:0-9"),
Annotation
- Immediate include surface: `linux/acpi.h`, `linux/clk.h`, `linux/cpuhotplug.h`, `linux/cpumask.h`, `linux/interrupt.h`, `linux/io.h`, `linux/mfd/syscon.h`, `linux/module.h`.
- Detected declarations: `struct hw_pmu_info`, `struct xgene_pmu_dev`, `struct xgene_pmu_ops`, `struct xgene_pmu`, `struct xgene_pmu_dev_ctx`, `struct xgene_pmu_data`, `enum xgene_pmu_version`, `enum xgene_pmu_dev_type`, `function xgene_pmu_event_show`, `function cpumask_show`.
- Atlas domain: Driver Families / drivers/perf.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.